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APD192G0640004S51

APD192G0640004S51 electronic component of Vishay

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Vishay Dale Plasma Displays 192 X 64 MODULE

Manufacturer: Vishay
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1: USD 543.5978 ea
Line Total: USD 543.6

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APD-192G064-1 Vishay Dale Plasma Panel Display Modules 192 x 64 Graphics Display with Drive Electronics TTL Level Data Interface and Integrated DC Converter FEATURES TTL level video interface. On board DC converter. Slim profile. Large, bright characters and graphics. Highly visible for long distance viewing. The APD-192G064-1 has been designed to offer high ELECTRICAL SPECIFICATIONS brightness and superior viewing aesthetics in a package that Voltages Required: VDC: + 12 to + 24 VDC. is very affordable. This display is ideal for low to medium Power Required: Typical = 12 watts. level information content messages and would be ideal for Maximum = 55 watts. applications such as arcade games, process control, POS terminals, medical equipment, message centers and ATM OPTICAL SPECIFICATIONS machines. Viewing Area: 15.33 389.38 W x 5.09 129.29 H. STANDARD ELECTRICAL SPECIFICATIONS* Pixel Pitch: 0.080 2.032 . DESCRIPTION SYMBOL MIN. TYP. MAX. UNITS Pixel Size: 0.050 1.27 . DC converter input VDC + 10.0 + 24.0 + 28.0 VDC Color: Neon orange. DC converter Amps Screen Clear 50% Lit 100% Lit Character Array: 8 x 8: 24 x 16. 6 x 8: 32 x 16. power + 12 V 0.100 1.7 3.5 Character Size: 0.48 12.19 W x 0.64 16.26 H . Logic 1 Input Vih 2.0 VDC Luminance: 50 foot lamberts minimum. Logic 0 Input V 0.8 VDC il *Recommended operating voltages. All maximums are absolute ENVIRONMENTAL SPECIFICATIONS maximum. Operating Temperature: 0C to + 70C. DIMENSIONS in inches millimeters Storage Temperature: - 40C to + 85C. Relative Operating Humidity: To 95% non-condensing. Mechanical Shock: 30 G. 192 x 64 Full Field Vibration: 3 G. Pixel Pitch: 0.080 2.03 Pixel Size: 0.050 1.27 Operating Altitude: 10,000 feet. Center of Active Area 0.156 17.055 433.20 GENERAL DESCRIPTION 3.96 The APD-192G064-1 DC Plasma display offers viewing 6.975 qualities designers seek such as high contrast, viewing 0.010 5.090 angle of 150 minimum, and long distance readability. 177.17 129.29 0.254 It is bright (50 foot lamberts minimum) with characters and 6.19 6.663 157.23 graphics figures presented in a pleasing neon orange color 169.24 against a black background. Plasma is much more readable and eye-pleasing than liquid crystal or vacuum fluorescent 8.527 216.59 0.403 3.217 displays and is filterable to red, amber, or neutral density. 0.156 15.330 389.38 10.24 81.71 3.96 These plasma display panels are driven in a standard 16.68 423.67 17.367 0.010 row - column refresh method much like a CRT display. The 0.840 441.12 0.254 21.34 designer need only supply TTL level signals for SERIAL DATA, DOT CLOCK, COLUMN LATCH, ROW DATA, ROW CLOCK and DISPLAY ENABLE. The SERIAL DATA is 0.447 0.025 entered with the DOT CLOCK up to frequencies as high as 11.35 0.635 8mHz. After a row of 192 pixels is clocked in, the COLUMN LATCH signal is toggled and the data is latched. At the time 1.10 27.94 ....... the data is latched, the display is briefly disabled using the ....... Max. Component Pin 1 of P1 DISPLAY ENABLE signal, then the row pointer is advanced Height 10.135 257.43 Ref. Pin 1 with the ROW CLOCK signal. Once each frame the ROW of P2 DATA must be asserted to synchronize the column serial 11.86 301.24 data with the beginning row. The recommended scanning Ref. frequency is approximately 70 Hz but may be as high as 200 Hz. The high clock rate on the data clock allows for rapid refresh and maximum access time to the refresh ram. www.vishay.com Document Number: 37013 2 Revision 05-Dec-00APD-192G064-1 Vishay Dale ROW CLOCK - This signal clocks ROW DATA on the falling PIN DESCRIPTION edge. The ROW CLOCK signal is repetitive and must be P3, POWER CONNECTOR present for proper scanning of the display module. The APD-192G064-1 has a unique input protection circuit AMP 641737-1 or equivalent. that assures the column drivers stay blanked on power up. (Mates with AMP 1-480424-0 or equivalent.) The protection circuit unblanks the column drivers when the PIN SIGNAL DESCRIPTION ROW CLOCK signal begins (i.e. the display begins scan- 4 N/C Reserved ning). 3 GND Ground LOGIC AND DATA TIMING 2 GND Ground 1 VDC DC Converter Supply P2, DATA CONNECTOR t 4 AMP 103309-2 or equivalent. Row Data (Mates with AMP 746195-2, MOLEX 39-27-1146 or equivalent.) PIN DESCRIPTION PIN DESCRIPTION t 2 1 DISPLAY ENABLE 2 GROUND t1 t3 3 ROW DATA 4 GROUND Row Clock 5 ROW CLOCK 6 GROUND 0 1 2 62 63 0 1 7 COLUMN LATCH 8 GROUND 001 2 62 631 Display Enable 9 DOT CLOCK 10 GROUND 11 SERIAL DATA 12 GROUND 13 No connect 14 GROUND Row Clock DESCRIPTION OF INPUT SIGNALS DOT CLOCK - This signal enters the SERIAL DATA on each Column Latch low to high transition. A total of 192 DOT CLOCK transitions must be present for each line of column/anode data. Display Enable SERIAL DATA - This signal presents the pixel data in 1st Bit of Row Will Appear in Leftmost Column positive logic format. A logic one represents a lit pixel and a 1 0 2 190 191 Serial Data logic zero represents an extinguished pixel. Data is entered from right to left. The first pixel data entered will represent the leftmost pixel in the row. t 5 COLUMN LATCH - This signal latches the pixel data into the driver outputs. When the COLUMN LATCH signal goes to Dot Clock logic one the data entered previously will fall through to the driver outputs. When the signal returns to a logic zero, the t t 6 7 Positive Edge x 192 data is latched and the shift register is now ready to accept the next row of data. Must be held low while entering new SERIAL DATA. DISPLAY ENABLE - This signal enables the output drivers. PARAMETER MINIMUM TYPICAL MAXIMUM UNITS Using a duty cycle control, this signal may also be used for t1 100 nS intensity control. The DISPLAY ENABLE must be at logic t 5 uS 2 zero before the COLUMN LATCH signal transitions. To avoid display blurring, the ROW CLOCK signal should also t 1 uS 3 transition while DISPLAY ENABLE is a logic zero. It is t 70 200 Hz 4 recommended that this signal remain low for 10 S min. t 25 nS 5 ROW DATA - This signal is the first line marker for the scan. t6 75 nS This input should be held high to correspond to the first row t 75 nS 7 of pixel data. ORDERING INFORMATION Display Module with Drivers, TTL Interface and On Board DC Converter ...................................................................... APD-192G064-1 Data Connector Kit ................................................................................................................................................................... 280105-05 Power Connector Kit................................................................................................................................................................. 280108-13 Video Controller (+5V) ........................................................................................................................................................... PDS-500 Video Contoller (+ 12V)....................................................................................................................................................... PDS-500-1 Document Number: 37013 www.vishay.com Revision 05-Dec-00 3

Tariff Desc

8531.20.00 32 .. - Indicator panels incorporating liquid crystal devices (LCD) or light emitting diodes (LED) Free

ELECTRIC SOUND OR VISUAL SIGNALLING APPARATUS (FOR EXAMPLE, BELLS, SIRENS, INDICATOR PANELS, BURGLAR OR FIRE ALARMS), Indicator panels incorporating liquid crystal devices (LCD) or light-emitting diodes (LED)
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