SiC402A, SiC402BCD www.vishay.com Vishay Siliconix 10 A microBUCK SiC402A/B Integrated Buck Regulator with Programmable LDO FEATURES High efficiency > 95 % 10 A continuous output current capability Integrated bootstrap switch Programmable 200 mA LDO with bypass logic Temperature compensated current limit All ceramic solution enabled Pseudo fixed-frequency adaptive on-time control Programmable input UVLO threshold DESCRIPTION Independent enable pin for switcher and LDO The Vishay Siliconix SiC402A/B an advanced stand-alone Selectable ultra sonic power-save mode (SiC402A) synchronous buck regulator featuring integrated power Selectable power-save mode (SiC402B) MOSFETs, bootstrap switch, and a programmable LDO in a Programmable soft-start and soft-shutdown space-saving PowerPAK MLP32-55G pin packages. 1 % internal reference voltage The SiC402A/B are capable of operating with all ceramic Power good output solutions and switching frequencies up to 1 MHz. The programmable frequency, synchronous operation and Over voltage and under voltage protections selectable power-save allow operation at high efficiency PowerCAD simulation software available at across the full range of load current. The internal LDO may www.vishay.com/power-ics/powercad-list/ be used to supply 5 V for the gate drive circuits or it may be Material categorization: for definitions of compliance bypassed with an external 5 V for optimum efficiency and please see www.vishay.com/doc 99912 used to drive external n-channel MOSFETs or other loads. Additional features include cycle-by-cycle current limit, APPLICATIONS voltage soft-start, under voltage protection, programmable Notebook, desktop, and server computers over current protection, soft shutdown and selectable power-save. The Vishay Siliconix SiC402A/B also provides Digital HDTV and digital consumer applications an enable input and a power good output. Networking and telecommunication equipment Printers, DSL, and STB applications PRIMARY CHARACTERISTICS Embedded applications Input voltage range 3 V to 28 V Point of load power supplies a Output voltage range 0.6 V to V x 0.75 IN Operating frequency 200 kHz to 1 MHz TYPICAL APPLICATION CIRCUIT AND Continuous output current 10 A PACKAGE OPTIONS Peak efficiency 95 % Package PowerPAK MLP32-55G 3.3 V Note EN/PSV (Tri-State) PGOOD LDO EN a. See High Output Voltage Operation section V OUT 32 31 30 29 28 27 26 25 VOUT FB LX 24 1 VOUT PAD 1 LX 2 23 V P DD GND AGND 22 3 AGND PGND PAD 3 4 21 P FBL GND LX 20 5 V IN V PAD 2 P IN GND 6 19 P SS V GND IN 18 7 BST PGND 8 17 Typical Application Circuit for SiC402A/B (PowerPAK MLP32-55G) S20-0483-Rev. D, 29-Jun-2020 Document Number: 63729 1 For technical questions, contact: powerictechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 V ENL IN 9 VIN T ON 10 A VIN GND 11 EN PSV NC 12 LX LX 13 I LIM NC 14 PGND PGOOD 15 P GND LX 16SiC402A, SiC402BCD www.vishay.com Vishay Siliconix PIN CONFIGURATION (Top View) 32 31 30 29 28 27 26 25 1 24 LX FB PAD 1 V 2 23 OUT LX V 3 A DD GND 22 P GND PAD 3 A GND 4 21 P GND FBL 5 LX 20 P GND PAD 2 V 6 19 P IN GND V IN SS 7 18 P GND P GND BST 8 17 SiC402A/B Pin Configuration (Top View) PIN DESCRIPTION PIN NUMBER SYMBOL DESCRIPTION Feedback input for switching regulator used to program the output voltage - connect to an external 1FB resistor divider from V to A OUT GND Switcher output voltage sense pin - also the input to the internal switch-over between V and OUT 2V OUT V . The voltage at this pin must be less than or equal to the voltage at the V pin LDO DD Bias supply for the IC - when using the internal LDO as a bias power supply, V is the LDO output. DD 3V DD When using an external power supply as the bias for the IC, the LDO output should be disabled 4, 30, PAD 1 A Analog ground GND Feedback input for the internal LDO - used to program the LDO output. Connect to an external 5FBL resistor divider from V to A DD GND 6, 9 to 11, PAD 2 V Input supply voltage IN The soft start ramp will be programmed by an internal current source charging a capacitor on this 7SS pin. Bootstrap pin - connect a capacitor of at least 100 nF from BST to LX to develop the floating supply 8BST for the high side gate drive 12, 14 NC No connection 13 LXBST LX boost - connect to the BST capacitor 23 to 25, PAD 3 LX Switching (phase) node 15 to 22 P Power ground GND Open-drain power good indicator - high impedance indicates power is good. An external pull-up 26 P GOOD resistor is required 27 I Current limit sense pin - used to program the current limit by connecting a resistor from I to LXS ILIM LIM 28 LXS LX sense - connects to R ILIM Enable/power-save input for the switching regulator - connect to A to disable the switching GND 29 EN/PSV regulator, connect to V to operate with power-save mode and float to operate in forced DD continuous mode 31 t On-time programming input - set the on-time by connecting through a resistor to A ON GND Enable input for the LDO - connect ENL to A to disable the LDO. Drive with logic signal for logic GND 32 ENL control, or program the V UVLO with a resistor divider between V , ENL, and A IN IN GND ORDERING INFORMATION P/N MARKING PART NUMBER PACKAGE (LINE 1: P/N) II SiC402ACD-T1-GE3 SiC402A PowerPAK Fyww MLP32-55G Format: SiC402BCD-T1-GE3 SiC402B Line 1: Dot SiC402DB Reference board Line 2: P/N Line 3: Siliconix Logo + LOT Code + ESD Symbol Line 4: Factory Code + Year Code + Work Week Code S20-0483-Rev. D, 29-Jun-2020 Document Number: 63729 2 For technical questions, contact: powerictechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 V 9 ENL IN V t IN 10 ON V A IN 11 GND 12 EN PSV NC LX 13 LX NC I 14 LIM P GND 15 P GOOD P LX GND 16