W25Q16DWZPIG

W25Q16DW 1.8V 16M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI Publication Release Date: September 1, 2014 - 1 - Revision J W25Q16DW Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 5 2. FEATURES ....................................................................................................................................... 5 3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 6 3.1 Pin Configuration SOIC 150 / 208-mil .................................................................................. 6 3.2 Pad Configuration WSON 6x5-mm, USON 4x3-mm ............................................................ 6 3.3 Pin Description SOIC 150 / 208-mil, WSON 6x5-mm, USON 4x3-mm ............................... 6 3.4 Ball Configuration WLCSP ................................................................................................... 7 3.5 Ball Description WLCSP ....................................................................................................... 7 3.6 Pin Configuration SOIC16 300-mil ....................................................................................... 8 3.7 Pin Description SOIC16 300-mil........................................................................................... 8 4. PIN DESCRIPTIONS ........................................................................................................................ 9 4.1 Chip Select (/CS) .................................................................................................................. 9 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 9 4.3 Write Protect (/WP)............................................................................................................... 9 4.4 HOLD (/HOLD) ..................................................................................................................... 9 4.5 Serial Clock (CLK) ................................................................................................................ 9 5. BLOCK DIAGRAM .......................................................................................................................... 10 6. FUNCTIONAL DESCRIPTION ....................................................................................................... 11 6.1 SPI/QPI OPERATIONS ...................................................................................................... 11 6.1.1 Standard SPI Instructions ..................................................................................................... 11 6.1.2 Dual SPI Instructions ............................................................................................................ 11 6.1.3 Quad SPI Instructions ........................................................................................................... 12 6.1.4 QPI Instructions .................................................................................................................... 12 6.1.5 Hold Function ........................................................................................................................ 12 6.2 WRITE PROTECTION ....................................................................................................... 13 6.2.1 Write Protect Features .......................................................................................................... 13 7. STATUS REGISTERS AND INSTRUCTIONS ............................................................................... 14 7.1 STATUS REGISTERS........................................................................................................ 14 7.1.1 BUSY .................................................................................................................................... 14 7.1.2 Write Enable Latch (WEL) .................................................................................................... 14 7.1.3 Block Protect Bits (BP2, BP1, BP0) ...................................................................................... 14 7.1.4 Top/Bottom Block Protect (TB) ............................................................................................. 14 7.1.5 Sector/Block Protect (SEC) ................................................................................................... 14 7.1.6 Complement Protect (CMP) .................................................................................................. 14 7.1.7 Status Register Protect (SRP1, SRP0) ................................................................................. 15 7.1.8 Erase/Program Suspend Status (SUS) ................................................................................. 15 7.1.9 Security Register Lock Bits (LB3, LB2, LB1, LB0) ................................................................ 15 7.1.10 Quad Enable (QE) .............................................................................................................. 15 - 2 -