Product Information

W9825G2JB-6I

W9825G2JB-6I electronic component of Winbond

Datasheet
DRAM Chip SDRAM 256Mbit 8Mx32 3.3V 90-Pin TFBGA

Manufacturer: Winbond
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 240
Multiples : 1

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W9825G2JB-6I
Winbond

240 : USD 12.4858
250 : USD 11.4452
500 : USD 11.3307
1000 : USD 11.1081
2000 : USD 10.9974
2500 : USD 10.888
3000 : USD 10.7786
5000 : USD 10.6705
10000 : USD 10.5637
25000 : USD 10.4682
N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1

Stock Image

W9825G2JB-6I
Winbond

1 : USD 8.8179
10 : USD 7.8186
25 : USD 7.6694
50 : USD 7.6097
100 : USD 6.9532
250 : USD 6.9532
N/A

Obsolete
     
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Product Category
Type
Mounting Style
Package / Case
Data Bus Width
Organisation
Memory Size
Maximum Clock Frequency
Supply Voltage - Max
Supply Voltage - Min
Supply Current - Max
Minimum Operating Temperature
Maximum Operating Temperature
Series
Hts Code
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W9825G2JB 2M 4 BANKS 32 BITS SDRAM Table of Contents- 1. GENERAL DESCRIPTION ......................................................................................................... 3 2. FEATURES ................................................................................................................................. 3 3. ORDER INFORMATION ............................................................................................................. 3 4. BALL CONFIGURATION ............................................................................................................ 4 5. BALL DESCRIPTION .................................................................................................................. 5 6. BLOCK DIAGRAM ...................................................................................................................... 6 6.1 Block diagram of single chip ........................................................................................... 6 6.2 Block diagram of Dual-Die-Package (DDP) .................................................................... 7 7. FUNCTIONAL DESCRIPTION.................................................................................................... 8 7.1 Power Up and Initialization ............................................................................................. 8 7.2 Programming Mode Register Set command .................................................................. 8 7.3 Bank Activate Command ................................................................................................ 8 7.4 Read and Write Access Modes ...................................................................................... 8 7.5 Burst Read Command .................................................................................................... 9 7.6 Burst Command .............................................................................................................. 9 7.7 Read Interrupted by a Read ........................................................................................... 9 7.8 Read Interrupted by a Write ............................................................................................ 9 7.9 Write Interrupted by a Write ............................................................................................ 9 7.10 Write Interrupted by a Read ............................................................................................ 9 7.11 Burst Stop Command ................................................................................................... 10 7.12 Addressing Sequence of Sequential Mode .................................................................. 10 7.13 Addressing Sequence of Interleave Mode .................................................................... 10 7.14 Auto-precharge Command ........................................................................................... 11 7.15 Precharge Command .................................................................................................... 11 7.16 Self Refresh Command ................................................................................................ 11 7.17 Power Down Mode ....................................................................................................... 12 7.18 No Operation Command ............................................................................................... 12 7.19 Deselect Command ...................................................................................................... 12 7.20 Clock Suspend Mode .................................................................................................... 12 8. OPERATION MODE ................................................................................................................. 13 9. ELECTRICAL CHARACTERISTICS ......................................................................................... 14 9.1 Absolute Maximum Ratings .......................................................................................... 14 9.2 Recommended DC Operating Conditions .................................................................... 14 9.3 Capacitance .................................................................................................................. 14 9.4 DC Characteristics ........................................................................................................ 15 9.5 AC Characteristics and Operating Condition ................................................................ 16 10. TIMING WAVEFORMS ............................................................................................................. 18 10.1 Command Input Timing ................................................................................................ 18 10.2 Read Timing .................................................................................................................. 19 Publication Release Date: Oct. 31, 2017 Revision: A02 - 1 - W9825G2JB 10.3 Control Timing of Input/Output Data ............................................................................. 20 10.4 Mode Register Set Cycle .............................................................................................. 21 11. OPERATINOPERATING TIMING EXAMPLE ........................................................................... 22 11.1 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) ...................................... 22 11.2 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge) ........... 23 11.3 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) ...................................... 24 11.4 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge) ........... 25 11.5 Interleaved Bank Write (Burst Length = 8) ................................................................... 26 11.6 Interleaved Bank Write (Burst Length = 8, Auto-precharge) ........................................ 27 11.7 Page Mode Read (Burst Length = 4, CAS Latency = 3) .............................................. 28 11.8 Page Mode Read/Write (Burst Length = 8, CAS Latency = 3) ..................................... 29 11.9 Auto-precharge Read (Burst Length = 4, CAS Latency = 3) ........................................ 30 11.10 Auto-precharge Write (Burst Length = 4) .................................................................... 31 11.11 Auto Refresh Cycle ..................................................................................................... 32 11.12 Self Refresh Cycle ....................................................................................................... 33 11.13 Bust Read and Single Write (Burst Length = 4, CAS Latency = 3) ............................. 34 11.14 Power down Mode ....................................................................................................... 35 11.15 Auto-precharge Timing (Read Cycle) .......................................................................... 36 11.16 Auto-precharge Timing (Write Cycle) .......................................................................... 37 11.17 Timing Chart of Read to Write Cycle ........................................................................... 38 11.18 Timing Chart of Write to Read Cycle ........................................................................... 38 11.19 Timing Chart of Burst Stop Cycle (Burst Stop Command) .......................................... 39 11.20 Timing Chart of Burst Stop Cycle (Precharge Command) .......................................... 39 11.21 CKE/DQM Input Timing (Write Cycle) ......................................................................... 40 11.22 CKE/DQM Input Timing (Read Cycle) ......................................................................... 41 12. PACKAGE SPECIFICATION .................................................................................................... 42 13. REVISION HISTORY ................................................................................................................ 43 Publication Release Date: Oct. 31, 2017 Revision: A02 - 2 -

Tariff Desc

8542.32.00 -- Memories
               Monolithic integrated circuits:
Winbond Elec
WINBOND ELECTRONICS
WINBOND ELECTRONICS CORP AMERICA

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