SDSoC Development Environment Introduction With the advent of smarter systems and the drive towards The Internet of Things, increasing the connectedness of people and things, most new products now leverage SoC-based platforms which allow companies to bring products to market faster, increase system-level efficiency and, most importantly, allow for continuous innovation and product differentiation. Design teams must choose carefully how to differentiate their products while still meeting ever increasing market requirements and stringent cost targets to maximize return on investment. True platform differentiation relies on a combination of both new software features as well as novel hardware features. Given the requirements to bring products to market faster that are truly differentiated at all levels, tools and environments are needed that enable both the software and hardware differentiation to be done with the completeness and ease of use found in traditional ASSP programming environment but without compromising on architecture or performance. For hardware differentiation today, many platform developers utilize FPGAs for their any-to-any connectivity where the programmable logic is used to interface the platforms processor(s) to the standard interfaces such as PCIe and Ethernet. In addition, many systems use FPGA as a coprocessor for acceleration of critical functions and algorithms, where the programmable logics parallel architecture can provide over 100X performance advantage compared to running on a standard processor. With the introduction of Zynq -7000 All Programmable SoC in 2011 and now the new Zynq UltraScale+ MPSoC, both combining powerful ARM - based processing systems and programmable logic in advanced 28nm and 16nm nodes respectively, Xilinx is providing a proven alternative to traditional processors and domain-specific application SoCs. The Zynq SoCs and MPSoCs can increase system performance and lower system power all while reducing bill of material costs. The SDSoC Development Environment provides a greatly Introducing the Xilinx SDSoC Development simplified ASSP-like C/C++ programming experience Environment including an easy to use Eclipse integrated design environment The Zynq SoCs and MPSoCs are natural fit for design teams (IDE) and a comprehensive development platform for consisting of software and FPGA hardware engineers. Teams with heterogeneous Zynq platform deployment. Complete with the limited or no hardware resources however have been challenged industrys first C/C++ full-system optimizing compiler, SDSoC due to the RTL (VHDL or Verilog) development expertise needed delivers system level profiling, automated software acceleration to take full advantage of the benefit of the device. To resolve this in programmable logic, automated system connectivity challenge and enable more design teams to take advantage of generation, and libraries to speed programming. It also provides Zynq devices, Xilinx has introduced SDSoC, a new C/C++ a flow for customer and 3rd party platform developers to enable development environment. The third member of the Xilinx SDx platforms to be used in the SDSoC development environment. family of development environments, the SDSoC development environment enables the broader community of embedded The SDSoC Development Environment software developers to leverage the power of hardware and software all programmable devices. C/C++ Development SDSoC Environment Software Dened Opportunity with SDSoC C/C++ Environment Delivering ASSP-like programming ASSP-like programming experience System-level pro ling System-level Pro ling Full system optimizing compiler Expert use model for platform Software-De ned developers and system architects CPU Specify C/C++ Functions All Programmable for Acceleration SoCs & MPSoCs Software-Prog Diagonal SoCs* Full System Optimizing Compiler Zynq SoCs MPSoCs with RTL Flows ASSP-Like Programming Experience Performance/Watt and Any to Any Connectivity Used by systems and embedded software developers, SDSoC provides an Eclipse IDE to develop C/C++ applications *Domain focused (e.g., image/video, SDR, etc.) Note: Software programmable devices often paired with FPGA for connectivity and co-processing running on bare metal or operating systems such as Linux and FreeRTOS. SDSoC enables the creation of complete heterogeneous multiprocessing systems, including software The SDSoC Development Environment accelerates development running on ARM/NEON processors, software accelerators of Zynq SoCs and MPSoCs in two ways. First software in programmable logic and reuse of legacy HDL IP Blocks as developers can get started sooner over a traditional hardware/ C-callable libraries. Unlike traditional separate hardware-centric software development flow by leveraging Xilinx, 3rd party or end and software-centric flows, which can result in development user platforms. Second, SDSoC eliminates the churn between delays and uncertainty in system architecture and performance, hardware and software teams typically required to take advantage SDSoC is architected to provide rapid system profiling and of programmable logic as software accelerators, truly accelerating software acceleration in programmable logic in a familiar overall system development. embedded developer framework. Traditional Development Schedule Software Development Hardware Development HDL Accelerators Software Dened Development Schedule 1 Software Development Accelerated Development 2 Platform Reduced Iterations with C/C++ Driven Accelerators Software development starts immediately, 3rd party and end user platforms 1 SDSoCs ASSP-like development, system-level proling and full system optimizing 2 compiler empowers software developers to accelerate C/C++ functions Ease of Development