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73S1210F-68IMR/F

73S1210F-68IMR/F electronic component of Analog Devices

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8-bit Microcontrollers - MCU SoC Smart Card Readr w/PINpad & PWR Mgt

Manufacturer: Analog Devices
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MOQ : 2500
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73S1210F-68IMR/F
Analog Devices

2500 : USD 5.213
N/A

Obsolete
     
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73S1210F Self-Contained Smart Card Reader with PINpad and Power Management Simplifying System Integration DATA SHEET May 2009 In addition, the circuit features an ON/OFF mode which GENERAL DESCRIPTION operates directly with an ON/OFF system switch: Any The 73S1210F is a versatile and economical CMOS activity on the ON/OFF button is debounced internally System-on-Chip device intended for smart card reader and controls the power generation circuit accordingly, applications. The circuit is built around an 80515 high- under the supervision of the firmware (OFF request / performance core it features primarily an ISO-7816 / EMV OFF acknowledgement at firmware level). The OFF interface and a generic asynchronous serial interface. mode can be alternatively initiated from the controller Delivered with turnkey Teridian embedded firmware, it (firmware action instead of ON/OFF switch). forms a ready-to-use smart card reader solution that can be seamlessly incorporated into any microprocessor-based In OFF mode, the circuit typically draws less than 1A, system where a serial line is available. which makes it ideal for applications where battery life must be maximized. 2 The solution is scalable, thanks to a built-in I C interface that allows to drive external electrical smart card interfaces Embedded Flash memory is in-system programmable such as Teridian 73S8010 ICs. This makes the solution and lockable by means of on-silicon fuses. This makes immediately able to support multi-card slots or multi-SAM the 73S1210F suitable for both development and architectures. production phases. In addition, the 73S1210 features a 5x6 PINpad interface, 8 Teridian Semiconductor Corporation offers with its user I/Os, multiple interrupt options and an analog voltage 73S1210F a very comprehensive set of software input (for DC voltage monitoring such as battery level libraries for EMV. Refer to the 73S12xxF Software detection) that make it suitable for low-cost PINpad reader Users Guide for a complete description of the devices. Application Programming Interface (API Libraries) and related software modules. The 80515 CPU core instruction set is compatible with the industry standard 8051, while offering one clock-cycle per A complete array of development and programming instruction processing power (most instructions). With a tools, libraries and demonstration boards enable rapid CPU clock running up to 24MHz, it results in up to 24MIPS development and certification of readers that meet available that meets the requirements of various encryption most demanding smart card standards. needs such as AES, DES / 3-DES and even RSA (for PIN encryption for instance). APPLICATIONS The circuit requires a single 6MHz to 12MHz crystal. PINpad smart card readers: o With serial connectivity o Ideal for low-cost POS Terminals and Digital The respective 73S1210F embedded memories are 32KB Identification (Secure Login, Govt ID, ...) Flash program memory, 2KB user XRAM memory, and SIM Readers in Personal Wireless devices 256B IRAM memory. Dedicated FIFOs for the ISO 7816 Payphones & Vending machines UART are independent from the user XRAM and IRAM. General purpose smart card readers Alternatively to the turnkey firmware offered by Teridian, customers can develop their own embedded firmware ADVANTAGES directly within their application or using Teridian 73S1210F Reduced BOM Evaluation Board through a JTAG-like interface. Versatile power supply options o 2.7V to 6.5V ranges The chip incorporates an inductor-based DC-DC converter Higher performance CPU core (up to 24MIPS) that generates all the necessary voltages to the various Built-in EMV/ISO slot, expandable to multi-slots 73S1210F function blocks (smart card interface, digital Flexible power supply options core, etc.) from any of two distinct power supply sources: o On-chip DC-DC converter the +5V bus (V , 4.4 to 6.5V), or a main battery (V , BUS BAT o CMOS switches between supply inputs 4.0V to 6.5V). The chip automatically powers-up the DC- Sub-A Power Down mode with ON/OFF switch DC converter with V if it is present, or uses V as the BUS BAT Powerful In-Circuit Emulation and Programming supply input if V is not present. Alternatively, the pin V BUS PC can support a wider power supply input range (2.7V to A complete set of EMV4.1 / ISO7816 libraries 6.5V), when using a single system supply source. Turnkey PC/SC firmware and host drivers o Multiple OS supported Rev. 1.4 2009 Teridian Semiconductor Corporation 1 73S1210F Data Sheet DS 1210F 001 FEATURES 80515 Core: Communication Interfaces: 1 clock cycle per instruction (most instructions) Full-duplex serial interface (1200 to 115kbps UART) CPU clocked up to 24MHz 2 I C Master Interface (400kbps) 32KB Flash memory (lockable) Man-Machine Interface and I/Os: 2kB XRAM (User Data Memory) 6x5 Keyboard (hardware scanning, debouncing 256 byte IRAM and scrambling) Hardware watchdog timer (8) User I/Os Oscillators: Single programmable current output (LED) Single low-cost 6MHz to 12MHz crystal Operating Voltage: An Internal PLL provides all the necessary clocks to Single supply 2.7V to 6.5V operation (VPC) each block of the system 5V supply (VBUS 4.4V to 5.5V) with or without Interrupts: battery back up operation (VBAT 4.0V to 6.5V) Standard 80C515 4-priority level structure Automated detection of voltage presence - Priority 9 different sources of interrupt to the core on VBUS over VBAT Power Down Modes: DC-DC Converter: 2 standard 80C515 Power Down and IDLE modes Requires a single 10H Inductor Sub-A OFF mode 3.3V / 20mA supply available for external circuits ON/OFF Main System Power Switch: Operating Temperature: Input for an SPST momentary switch to ground -40C to 85C Timers: Package: (2) Standard 80C52 timers T0 and T1 68-pin QFN, 44 pin QFN (1) 16-bit timer Turnkey Firmware: Built-in ISO-7816 Card Interface: Compliant with PC/SC, ISO7816 and EMV4.1 specifications Linear regulator produces VCC for the card (1.8V, 3V or 5V) Features a Power Down mode accessible from the host Full compliance with EMV 4.1 Supports Plug & Play over serial interface Activation/Deactivation sequencers Windows XP driver available (*) Auxiliary I/O lines (C4 and C8 signals) Windows CE / Mobile driver available (*) 7kV ESD protection on all interface pins Linux and other OS: Upon request Communication with Smart Cards: Or for custom developments: ISO 7816 UART 9600 to 115kbps for T=0, T=1 o A complete set of ISO-7816, EMV4.1 and (2) 2-Byte FIFOs for transmit and receive low-level libraries are available for T=0 / T=1 Configured to drive multiple external Teridian o Two-level Application Programming Interface 73S8010x interfaces (for multi-SAM architectures) (ANSI C-language libraries) Voltage Detection: Analog Input (detection range: 1.0V to 2.5V) (*) Contact Teridian Semiconductor for conditions and availability. 2 Rev. 1.4

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8542.31.00 52 No ..CMOS and MOS Microprocessors (MPU), Microcontrollers (MCU) and Digital Signal Processors (DSP)

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