Low Cost, 14-Bit, Dual Channel Synchro/Resolver-to-Digital Converter Data Sheet AD2S44 The core of each conversion is performed by state-of-the-art mono- FEATURES lithic, integrated circuits manufactured by the Analog Devices, Inc., Low per-channel cost proprietary BiMOS II process, which combines the advantages of 32-lead DIL hybrid package low power CMOS digital logic with bipolar linear circuits. The 2.6 arc minute accuracy use of these ICs keeps the internal component count low and 14-bit resolution Built-in test ensures high reliability. Independent reference inputs The built-in test (BIT) facility can be used in failsafe systems to High tracking rate provide an indication of whether the converter is tracking APPLICATIONS accurately. Gimbal/gyro control systems Each channel incorporates a high accuracy differential condi- Robotics tioning circuit for signal inputs providing more than 74 dB of Engine controllers common-mode rejection. Options are available for both synchro Coordinate conversion and resolver format inputs. The converter output is via a three-state Military servo control systems transparent latch allowing data to be read without interruption Fire control systems of the converter operation. The A/B and OE control lines select Avionic systems the channel and present the digital position to the common Antenna monitoring data outputs. CNC machine tooling The AD2S44 also features independent reference inputs where GENERAL DESCRIPTION different reference frequencies can be used for each channel. The AD2S44 is a 14-bit dual channel, continuous tracking synchro/ All components are 100% tested at 55C, +25C, and +125C. resolver-to-digital converter. It has been designed specifically Devices are processed to high reliability screening standards for applications where space, weight, and cost are at a premium. and receive further levels of testing and screening to ensure Each 32-lead hybrid device contains two independent Type II servo high levels of reliability. loop tracking converters. The ratiometric conversion technique employed provides excellent noise immunity and tolerance of long lead lengths. FUNCTIONAL BLOCK DIAGRAM R (A) HI REFERENCE R (A) CONDITIONER LO +V S S1 (A) HIGH PHASE- GND SYNCHRO/ SPEED UP-DOWN S2 (A) ERROR SENSITIVE INTEGRATOR VCO RESOLVER SIN/COS AMP COUNTER DETECTOR V S3 (A) S CONDITIONER MULTIPLIER S4 (A) BIT BUILT-IN A/B TEST THREE- DETECTION OE STATE AD2S44 DB1 (MSB) OUTPUT LATCHES TO DB14 (LSB) S1 (B) HIGH SYNCHRO/ PHASE- S2 (B) SPEED UP-DOWN ERROR RESOLVER SENSITIVE INTEGRATOR VCO S3 (B) SIN/COS COUNTER AMP CONDITIONER DETECTOR MULTIPLIER S4 (B) R (B) HI REFERENCE R (B) CONDITIONER LO Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 19892011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 02947-001AD2S44 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Output Enable (OE) ......................................................................8 Applications ....................................................................................... 1 Built-In Test (BIT) .........................................................................8 General Description ......................................................................... 1 Scaling for Nonstandard Signals .................................................9 Functional Block Diagram .............................................................. 1 Dynamic Performance ..................................................................9 Table of Contents .............................................................................. 2 Acceleration Error .........................................................................9 Revision History ............................................................................... 2 Reliability ..................................................................................... 10 Specif icat ions ..................................................................................... 3 Processing for High Reliability (B Suffix) ............................... 10 Absolute Maximum Ratings ............................................................ 5 Other Products ........................................................................... 10 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 11 Pin Configuration and Function Descriptions ............................. 6 Ordering Guide .......................................................................... 11 Theory of Operation ........................................................................ 7 Ordering Information ................................................................ 11 Connecting the Converter ........................................................... 7 B Channel Select (A/ ) ................................................................... 7 REVISION HISTORY Changes to Processing for High Reliability Section and 10/11Rev. A to Rev. B Other Products Section ................................................................. 10 Changes to Figure 1 .......................................................................... 1 Updated Outline Dimensions ....................................................... 11 Changes to Figure 3 .......................................................................... 7 Changes to Ordering Guide .......................................................... 11 08/08Rev. 0 to Rev. A Changes to Ordering Information ............................................... 11 Updated Format ................................................................ Universal 10/89Revision 0: Initial Version Changes to Specifications Section .................................................. 3 Changes to Absolute Maximum Ratings Section ......................... 5 Deleted Standard Processing Section ............................................. 7 Rev. B Page 2 of 12