2.7 V to 5.5 V, Serial-Input, Voltage-Output, 14-Bit DACs AD5551/AD5552 FEATURES FUNCTIONAL BLOCK DIAGRAMS V DD Full 14-bit performance 8 3 V and 5 V single supply operation AD5551 Low 0.625 mW power dissipation 3 1 V 14-BIT DAC V OUT REF 1 s settling time 2 AGND Unbuffered voltage output capable of driving 60 k loads directly CS 4 14-BIT DATA LATCH DIN 6 SPI/QSPI/MICROWIRE-compatible interface standards CONTROL LOGIC Power-on reset clears DAC output to 0 V (unipolar mode) SCLK 5 SERIAL INPUT REGISITER 5 kV HBM ESD classification 7 DGND APPLICATIONS Figure 1. Digital gain and offset adjustment V DD Automatic test equipment 14 Data acquisition systems R FB AD5552 1 RFB Industrial process control R INV 13 INV 6 V REFF GENERAL DESCRIPTION 2 V 14-BIT DAC OUT The AD5551/AD5552 are single, 14-bit, serial-input, voltage- 5 V 3 AGNDF REFS output DACs that operate from a single 2.7 V to 5.5 V supply. CS 7 14-BIT DATA LATCH The DAC output range extends from 0 V to VREF. LDAC 11 CONTROL 4 AGNDS These DACs provide 14-bit performance without any adjust- LOGIC SCLK 8 ments. The DAC output is unbuffered, which reduces power DIN 10 SERIAL INPUT REGISITER consumption and offset errors contributed by an output buffer. 12 DGND With an external op amp, the AD5552 can be operated in Figure 2. bipolar mode generating a VREF output swing. The AD5552 also includes Kelvin sense connections for the reference and PRODUCT HIGHLIGHTS analog ground pins to reduce layout sensitivity. For higher precision applications, refer to 16-bit DACs AD5541, AD5542, 1. Single Supply Operation. and AD5544. The AD5551 and AD5552 are fully specified and guaranteed for a single 2.7 V to 5.5 V supply. The AD5551/AD5552 utilize a versatile 3-wire interface that is 2. Low Power Consumption. compatible with SPI, QSPI, MICROWIRE, and DSP interface Typically 0.625 mW with a 5 V supply. standards. The AD5551 and AD5552 are available in 8-lead and 3. 3-Wire Serial Interface. 14-lead SOIC packages. 4. Unbuffered output capable of driving 60 k loads, which reduces power consumption as there is no internal buffer to drive. 5. Power-On Reset Circuitry. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20002010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 01943-001 01943-002AD5551/AD5552 TABLE OF CONTENTS Features .............................................................................................. 1 Bipolar Output Operation ......................................................... 12 Applications ....................................................................................... 1 Output Amplifier Selection ....................................................... 12 General Description ......................................................................... 1 Force Sense Buffer Amplifier Selection ................................... 12 Functional Block Diagrams ............................................................. 1 Reference and Ground ............................................................... 13 Product Highlights ........................................................................... 1 Power-On Reset .......................................................................... 13 Revision History ............................................................................... 2 Power Supply and Reference Bypassing .................................. 13 Specif icat ions ..................................................................................... 3 Microprocessor Interfacing ........................................................... 14 Timing Characteristics ................................................................ 4 ADSP-21xx to AD5551/AD5552 Interface ............................. 14 Absolute Maximum Ratings ............................................................ 5 68HC11 to AD5551/AD5552 Interface ................................... 14 ESD Caution .................................................................................. 5 MICROWIRE to AD5551/AD5552 Interface ........................ 14 Pin Configurations and Function Descriptions ........................... 6 80C51/80L51 to AD5551/AD5552 Interface .......................... 14 Typical Performance Characteristics ............................................. 7 Applications Information .............................................................. 15 Terminology .................................................................................... 10 Optocoupler Interface ................................................................ 15 Theory of Operation ...................................................................... 11 Decoding Multiple AD5551/AD5552s .................................... 15 Digital-to-Analog Section ......................................................... 11 Outline Dimensions ....................................................................... 16 Serial Interface ............................................................................ 11 Ordering Guide .......................................................................... 16 Unipolar Output Operation ...................................................... 11 REVISION HISTORY 5/10Rev. 0 to Rev. A Updated Format .................................................................. Universal Changes to Data Sheet Title, Features Section, General Description Section, and Product Highlights Section ................. 1 Changes to Specifications Section .................................................. 3 Changes to Table 3 ............................................................................ 5 Changes to Pin V Description in Table 4 and Table 5 ............. 6 DD Changes to Typical Performance Characteristics Section ........... 7 Changes to First Paragraph in Theory of Operation Section ... 11 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 16 7/00Revision 0: Initial Version Rev. A Page 2 of 16