14-Bit, 40 MSPS/65 MSPS Analog-to-Digital Converter AD6644 Designed for multichannel, multimode receivers, the AD6644 FEATURES is part of the Analog Devices, Inc. new SoftCell transceiver 65 MSPS guaranteed sample rate chipset. The AD6644 achieves 100 dB multitone, spurious-free 40 MSPS version available dynamic range (SFDR) through the Nyquist band. This break- Sampling jitter < 300 fs through performance eases the burden placed on multimode 100 dB multitone SFDR digital receivers (software radios) which are typically limited by 1.3 W power dissipation the ADC. Noise performance is exceptional typical signal-to- Differential analog inputs noise ratio is 74 dB. Pin compatible to AD6645 Twos complement digital output format The AD6644 is also useful in single channel digital receivers 3.3 V CMOS compatible designed for use in wide-channel bandwidth systems (CDMA, Data-ready for output latching WCDMA). With oversampling, harmonics can be placed outside the analysis bandwidth. Oversampling also facilitates the use of decimation receivers (such as the AD6620), allowing APPLICATIONS the noise floor in the analysis bandwidth to be reduced. By Multichannel, multimode receivers replacing traditional analog filters with predictable digital AMPS, IS-136, CDMA, GSM, WCDMA components, modern receivers can be built using fewer RF Single channel digital receivers components, resulting in decreased manufacturing costs, higher Antenna array processing manufacturing yields, and improved reliability. Communications instrumentation The AD6644 is built on the Analog Devices high speed Radar, infrared imaging complementary bipolar process (XFCB) and uses an innovative, Instrumentation multipass circuit architecture. Units are packaged in a 52-lead plastic low profile quad flat package (LQFP) specified from 25C to +85C. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD6644 is a high speed, high performance, monolithic 14-bit 1. Guaranteed sample rate is 65 MSPS. analog-to-digital converter (ADC). All necessary functions, including track-and-hold (TH) and reference, are included on- 2. Fully differential analog input stage. chip to provide a complete conversion solution. The AD6644 3. Digital outputs can be run on 3.3 V supply for easy interface provides CMOS-compatible digital outputs. It is the third to digital ASICs. 4. Complete solution: reference and track-and-hold. generation in a wideband ADC family, preceded by the AD9042 5. Packaged in small, surface-mount, plastic, 52-lead LQFP. (12-bit 41 MSPS) and the AD6640 (12-bit 65 MSPS, IF sampling). FUNCTIONAL BLOCK DIAGRAM AV DV CC CC AIN A1 TH1 TH2 A2 TH3 TH4 TH5 ADC3 AIN 6 ADC1 DAC1 ADC2 DAC2 AD6644 V 2.4V REF 5 5 ENCODE INTERNAL DIGITAL ERROR CORRECTION LOGIC TIMING ENCODE GND DMID OVR DRY D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 (MSB) (LSB) Figure 1. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 00971-001AD6644 TABLE OF CONTENTS Features .............................................................................................. 1 Explanation of Test Levels............................................................7 Applications....................................................................................... 1 Thermal Resistance.......................................................................7 General Description ......................................................................... 1 ESD Caution...................................................................................7 Product Highlights ........................................................................... 1 Pin Configuration and Function Descriptions..............................8 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ..............................................9 Revision History ............................................................................... 2 Equivalent Circuits......................................................................... 12 Specifications..................................................................................... 3 Terminology.................................................................................... 13 DC Specifications ......................................................................... 3 Theory of Operation ...................................................................... 15 Digital Specifications ................................................................... 4 Applying the AD6644 ................................................................ 15 Switching Specifications .............................................................. 4 Evaluation Board ............................................................................ 18 AC Specifications.......................................................................... 5 Outline Dimensions....................................................................... 21 Timing Diagram ........................................................................... 6 Ordering Guide .......................................................................... 21 Absolute Maximum Ratings............................................................ 7 REVISION HISTORY 8/07Rev. C to Rev. D Changes to Table 5............................................................................ 5 Changes to Noise (for Any Range Within the ADC) Definition .. 13 Added Table 8.................................................................................. 16 Changes to Evaluation Board Section.......................................... 18 Changes to Ordering Guide .......................................................... 21 5/03Data Sheet changed from Rev. B to Rev. C Updated Outline Dimensions ....................................................... 19 3/03Data Sheet changed from Rev. A to Rev. B Change to Digital Specifications Note ........................................... 2 3/03Data Sheet changed from Rev. 0 to Rev. A Edits to Specifications ...................................................................... 2 Renumbering of Figures and TPCs..................................Universal Updated Outline Dimensions ....................................................... 19 Rev. D Page 2 of 24