2 LC MOS a 8-Bit DAC with Output Amplifiers AD7224 FEATURES FUNCTIONAL BLOCK DIAGRAM 8-Bit CMOS DAC with Output Amplifiers Operates with Single or Dual Supplies Low Total Unadjusted Error: Less Than 1 LSB Over Temperature Extended Temperature Range Operation mP-Compatible with Double Buffered Inputs Standard 18-Pin DIPs, and 20-Terminal Surface Mount Package and SOIC Package GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7224 is a precision 8-bit voltage-output, digital-to- 1. DAC and Amplifier on CMOS Chip analog converter, with output amplifier and double buffered The single-chip design of the 8-bit DAC and output amplifier interface logic on a monolithic CMOS chip. No external trims is inherently more reliable than multi-chip designs. CMOS are required to achieve full specified performance for the part. fabrication means low power consumption (35 mW typical with single supply). The double buffered interface logic consists of two 8-bit regis- tersan input register and a DAC register. Only the data held in 2. Low Total Unadjusted Error the DAC registers determines the analog output of the con- The fabrication of the AD7224 on Analog Devices Linear 2 verter. The double buffering allows simultaneous update in a Compatible CMOS (LC MOS) process coupled with a novel system containing multiple AD7224s. Both registers may be DAC switch-pair arrangement, enables an excellent total un- made transparent under control of three external lines, CS, WR adjusted error of less than 1 LSB over the full operating tem- and LDAC. With both registers transparent, the RESET line perature range. functions like a zero override a useful function for system cali- 3. Single or Dual Supply Operation bration cycles. All logic inputs are TTL and CMOS (5 V) level The voltage-mode configuration of the AD7224 allows opera- compatible and the control logic is speed compatible with most tion from a single power supply rail. The part can also be op- 8-bit microprocessors. erated with dual supplies giving enhanced performance for Specified performance is guaranteed for input reference voltages some parameters. from +2 V to +12.5 V when using dual supplies. The part is also 4. Versatile Interface Logic specified for single supply operation using a reference of +10 V. The high speed logic allows direct interfacing to most micro- The output amplifier is capable of developing +10 V across a processors. Additionally, the double buffered interface en- 2 k load. ables simultaneous update of the AD7224 in multiple DAC The AD7224 is fabricated in an all ion-implanted high speed systems. The part also features a zero override function. 2 Linear Compatible CMOS (LC MOS) process which has been specifically developed to allow high speed digital logic circuits and precision analog circuits to be integrated on the same chip. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703AD7224SPECIFICATIONS 1 (V = 11.4 V to 16.5 V, V = 5 V 6 10% AGND = DGND = O V V = +2 V to (V 4 V) unless otherwise noted. DD SS REF DD DUAL SUPPLY All specifications T to T unless otherwise noted.) MIN MAX K, B, T L, C, U 2 2 Parameter Versions Versions Units Conditions/Comments STATIC PERFORMANCE Resolution 8 8 Bits Total Unadjusted Error 2 1 LSB max V = +15 V 5%, V = +10 V DD REF Relative Accuracy 1 1/2 LSB max Differential Nonlinearity 1 1 LSB max Guaranteed Monotonic Full-Scale Error 3/2 1 LSB max Full-Scale Temperature Coefficient 20 20 ppm/C max V = 14 V to 16.5 V, V = +10 V DD REF Zero Code Error 30 20 mV max Zero Code Error Temperature Coefficient 50 30 V/C typ REFERENCE INPUT Voltage Range 2 to (V 4) 2 to (V 4) V min to V max DD DD Input Resistance 8 8 k min 3 Input Capacitance 100 100 pF max Occurs when DAC is loaded with all 1s. DIGITAL INPUTS Input High Voltage, V 2.4 2.4 V min INH Input Low Voltage, V 0.8 0.8 V max INL Input Leakage Current 1 1 A max V = 0 V or V IN DD 3 Input Capacitance 8 8 pF max Input Coding Binary Binary DYNAMIC PERFORMANCE 3 Voltage Output Slew Rate 2.5 2.5 V/s min 3 Voltage Output Settling Time Positive Full-Scale Change 5 5 s max V = +10 V Settling Time to 1/2 LSB REF Negative Full-Scale Change 7 7 s max V = +10 V Settling Time to 1/2 LSB REF Digital Feedthrough 50 50 nV secs typ V = 0 V REF Minimum Load Resistance 2 2 k min V = +10 V OUT POWER SUPPLIES V Range 11.4/16.5 11.4/16.5 V min/V max For Specified Performance DD V Range 4.5/5.5 4.5/5.5 V min/V max For Specified Performance SS I DD 25C 4 4 mA max Outputs Unloaded V = V or V IN INL INH T to T 6 6 mA max Outputs Unloaded V = V or V MIN MAX IN INL INH I SS 25C 3 3 mA max Outputs Unloaded V = V or V IN INL INH T to T 5 5 mA max Outputs Unloaded V = V or V MIN MAX IN INL INH 3, 4 SWITCHING CHARACTERISTICS t 1 25C 90 90 ns min Chip Select/Load DAC Pulse Width T to T 90 90 ns min MIN MAX t 2 25C 90 90 ns min Write/Reset Pulse Width T to T 90 90 ns min MIN MAX t 3 25C 0 0 ns min Chip Select/Load DAC to Write Setup Time T to T 0 0 ns min MIN MAX t 4 25C 0 0 ns min Chip Select/Load DAC to Write Hold Time T to T 0 0 ns min MIN MAX t 5 25C 90 90 ns min Data Valid to Write Setup Time T to T 90 90 ns min MIN MAX t 6 25C 10 10 ns min Data Valid to Write Hold Time T to T 10 10 ns min MIN MAX NOTES 1 Maximum possible reference voltage. 2 Temperature ranges are as follows: K, L Versions: 40C to +85C B, C Versions: 40C to +85C T, U Versions: 55C to +125C 3 Sample Tested at 25C by Product Assurance to ensure compliance. 4 Switching characteristics apply for single and dual supply operation. Specifications subject to change without notice. 2 REV. B