12-Bit, 80 MSPS, 3 V A/D Converter Data Sheet AD9236 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD Single 3 V supply operation (2.7 V to 3.6 V) SNR = 70.4 dBc to Nyquist AD9236 SFDR = 87.8 dBc to Nyquist VIN+ 8-STAGE SHA MDAC1 A/D Low power: 366 mW 1 1/2-BIT PIPELINE VIN Differential input with 500 MHz bandwidth 4 16 3 On-chip reference and sample-and-hold A/D REFT DNL = 0.4 LSB REFB CORRECTION LOGIC OTR Flexible analog input: 1 V p-p to 2 V p-p range 12 Offset binary or twos complement data format OUTPUT BUFFERS Clock duty cycle stabilizer D11 (MSB) VREF D0 (LSB) APPLICATIONS SENSE CLOCK 0.5V MODE High end medical imaging equipment DUTY CYCLE SELECT REF STABILIZER IF sampling in communications receivers SELECT WCDMA, CDMA-One, CDMA-2000 Battery-powered instruments AGND CLK PDWN MODE DGND 03066-0-001 Hand-held scopemeters Low cost digital oscilloscopes Figure 1. DTV subsystems presented in straight binary or twos complement formats. An out-of-range (OTR) signal indicates an overflow condition that GENERAL DESCRIPTION can be used with the most significant bit to determine low or The AD9236 is a monolithic, single 3 V supply, 12-bit, 80 MSPS high overflow. Fabricated on an advanced CMOS process, the analog-to-digital converter featuring a high performance sample- AD9236 is available in a 28-lead TSSOP and a 32-lead LFCSP and-hold amplifier (SHA) and voltage reference. The AD9236 and is specified over the industrial temperature range uses a multistage differential pipelined architecture with output (40C to +85C). error correction logic to provide 12-bit accuracy at 80 MSPS PRODUCT HIGHLIGHTS and guarantee no missing codes over the full operating 1. The AD9236 operates from a single 3 V power supply and temperature range. features a separate digital output driver supply to The wide bandwidth, truly differential SHA allows a variety of accommodate 2.5 V and 3.3 V logic families. user-selectable input ranges and common modes, including 2. Operating at 80 MSPS, the AD9236 consumes a low 366 mW. single-ended applications. It is suitable for multiplexed systems 3. The patented SHA input maintains excellent performance for that switch full-scale voltage levels in successive channels and input frequencies up to 100 MHz, and can be configured for for sampling single-channel inputs at frequencies well beyond single-ended or differential operation. the Nyquist rate. Combined with power and cost savings over previously available analog-to-digital converters, the AD9236 is 4. The AD9236 is pin compatible with the AD9215, AD9235, suitable for applications in communications, imaging, and and AD9245. This allows a simplified migration from 10 bits medical ultrasound. to 14 bits and 20 MSPS to 80 MSPS. A single-ended clock input is used to control all internal 5. The DCS maintains overall ADC performance over a wide range of clock pulse widths. conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining 6. The OTR output bit indicates when the signal is beyond the excellent overall ADC performance. The digital output data is selected input range. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2013 Analog Devices, Inc. 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Technical Support www.analog.com AD9236 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Equivalent Circuits ......................................................................... 10 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 11 General Description ......................................................................... 1 Theory of Operation ...................................................................... 14 Functional Block Diagram .............................................................. 1 Analog Input and Reference Overview ................................... 14 Product Highlights ........................................................................... 1 Clock Input Considerations ...................................................... 15 Revision History ............................................................................... 2 Power Dissipation and Standby Mode .................................... 16 DC Specifications ............................................................................. 3 Digital Outputs ........................................................................... 16 AC Specifications .............................................................................. 4 Timing.......................................................................................... 17 Digital Specifications ........................................................................ 5 Voltage Reference ....................................................................... 17 Switching Specifications .................................................................. 6 Operational Mode Selection ..................................................... 18 Absolute Maximum Ratings ............................................................ 7 Evaluation Board ........................................................................ 18 Thermal Resistance ...................................................................... 7 Outline Dimensions ....................................................................... 33 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 34 Terminology ...................................................................................... 8 Pin Configurations and Function Descriptions ........................... 9 REVISION HISTORY 2/13Rev. B to Rev. C 10/03Rev. 0 to Rev. A Changed CP-32-2 Package to CP-32-7 Package ............. Universal Changes to Figure 30 ...................................................................... 15 Changes to Figure 4 .......................................................................... 9 Changes to Figure 33 ..................................................................... 17 Updated Outline Dimensions ....................................................... 33 Changes to Figure 40 ...................................................................... 22 Changes to Ordering Guide .......................................................... 34 Changes to Figure 49 ...................................................................... 28 Changes to Figure 50 ...................................................................... 29 1/06Rev. A to Rev. B Changes to Table 11 ....................................................................... 32 Changes to Figure 29 ...................................................................... 15 Changes to Ordering Guide .......................................................... 33 Changes to Equation in Jitter Considerations Section .............. 16 Changes to Internal Reference Connection Section, Figure 34, and Table 10 ..................................................................................... 17 Changes to Figure 35 ...................................................................... 18 Changes to Figure 38 ...................................................................... 20 Changes to Figure 39 ...................................................................... 21 Changes to Figure 48 ...................................................................... 27 Changes to Figure 49 ...................................................................... 28 Changes to Figure 50 ...................................................................... 29 Changes to Table 12 ........................................................................ 32 Updated Outline Dimensions ....................................................... 33 Changes to Ordering Guide .......................................................... 34 Rev. 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