16-Bit, 1 MSPS Module Data Acquisition System Data Sheet ADAQ7980/ADAQ7988 FEATURES FUNCTIONAL BLOCK DIAGRAM V+ REF REF OUT LDO OUT VDD Easy to use Module data acquisition system All active components designed by Analog Devices, Inc. 50% PCB area savings PD REF PD LDO LDO Includes critical passive components 10F 2.2F SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface VIO Daisy-chain multiple ADAQ7980/ADAQ7988 devices IN+ 20 SDI Versatile supply configuration with 1.8 V/2.5 V/3 V/5 V IN SCK ADC logic interface SDO AMP OUT CNV High performance 1.8nF 16-bit resolution with no missing codes ADAQ7980/ ADAQ7988 Throughput: 1 MSPS (ADAQ7980) and 500 kSPS (ADAQ7988) INL: 8 ppm typical and 20 ppm maximum V PD AMP ADCN GND Figure 1. SNR: 91.5 dB typical at 10 kHz (unity gain) THD: 105 dB at 10 kHz The ADAQ7980/ADAQ7988 contain a high accuracy, low power, Zero error: 0.06 mV typical (unity gain) 16-bit SAR ADC, a low power, high bandwidth, high input Zero error temperature drift: 1.3 V/C maximum impedance ADC driver, a low power, stable reference buffer, Low power dissipation and an efficient power management block. Housed within a tiny, 21 mW typical at 1 MSPS (ADAQ7980) 5 mm 4 mm LGA package, these products simplify the design 16.5 mW typical at 500 kSPS (ADAQ7988) process for data acquisition systems. The level of system integration Flexible power-down modes of the ADAQ7980/ADAQ7988 solves many design challenges, Small, 24-lead, 5 mm 4 mm LGA package while the devices still provide the flexibility of a configurable Excellent ESD ratings ADC driver feedback loop to allow gain and/or common-mode 3500 V human body model (HBM) adjustments. A set of four device supplies provides optimal system 1250 V field-induced charged device model (FICDM) performance however, single-supply operation is possible with Wide operating temperature range: 55C to +125C minimal impact on device operating specifications. APPLICATIONS The ADAQ7980/ADAQ7988 integrate within a compact, Automated test equipment (ATE) integrated circuit (IC)-like form factor key components Battery powered instrumentation commonly used in data acquisition signal chain designs. The Communications Module family transfers the design burden of component Data acquisition selection, optimization, and layout from designer to device, Process control shortening overall design time, system troubleshooting, and Medical instruments ultimately improving time to market. The serial peripheral interface (SPI)-compatible serial interface GENERAL DESCRIPTION features the ability to daisy-chain multiple devices on a single, 3- The ADAQ7980/ADAQ7988 are 16-bit analog-to-digital converter wire bus and provides an optional busy indicator. The user (ADC) Module data acquisition systems that integrate four interface is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic. common signal processing and conditioning blocks into a system Specified operation of these devices is from 55C to +125C. in package (SiP) design that supports a variety of applications. These devices contain the most critical passive components, Table 1. Integrated SAR ADC Modules eliminating many of the design challenges associated with Type 500 kSPS 1000 kSPS traditional signal chains that use successive approximation 16-Bit ADAQ7988 ADAQ7980 register (SAR) ADCs. These passive components are crucial to achieving the specified device performance. Rev. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 15060-001ADAQ7980/ADAQ7988 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Slew Enhancement ..................................................................... 33 Applications ....................................................................................... 1 Effect of Feedback Resistor on Frequency Response ............ 33 General Description ......................................................................... 1 Voltage Reference Input ............................................................ 33 Functional Block Diagram .............................................................. 1 Power Supply ............................................................................... 35 Revision History ............................................................................... 2 LDO Regulator Current-Limit and Thermal Overload Protection .................................................................................... 36 Specifications ..................................................................................... 3 LDO Regulator Thermal Considerations ............................... 36 Dual-Supply Configuration ........................................................ 3 Digital Interface .......................................................................... 37 Single-Supply Configuration ...................................................... 7 3-Wire CS Mode Without the Busy Indicator ........................ 38 Timing Specifications ................................................................ 11 3-Wire CS Mode with the Busy Indicator ............................... 39 Absolute Maximum Ratings .......................................................... 13 CS 4-Wire Mode Without the Busy Indicator ........................ 40 Thermal Data .............................................................................. 13 CS Thermal Resistance .................................................................... 13 4-Wire Mode with the Busy Indicator ............................... 41 ESD Caution ................................................................................ 13 Chain Mode Without the Busy Indicator................................ 42 Pin Configuration and Function Descriptions ........................... 15 Chain Mode with the Busy Indicator ...................................... 43 Typical Performance Characteristics ........................................... 17 Application Circuits ....................................................................... 44 Terminology .................................................................................... 25 Nonunity Gain Configurations ................................................ 45 Theory of Operation ...................................................................... 26 Inverting Configuration with Level Shift ................................ 46 Circuit Information .................................................................... 26 Using the ADAQ7980/ADAQ7988 With Active Filters ........ 47 Converter Operation .................................................................. 26 Applications Information .............................................................. 48 Typical Connection Diagram.................................................... 27 Layout .......................................................................................... 48 ADC Driver Input ...................................................................... 28 Evaluating the Performance of the ADAQ7980/ADAQ7988 ... 48 Input Protection .......................................................................... 28 Outline Dimensions ....................................................................... 49 Noise Considerations And Signal Settling .............................. 28 Ordering Guide .......................................................................... 49 PD AMP Operation .................................................................. 31 Dynamic Power Scaling (DPS) ................................................. 31 REVISION HISTORY 8/2017Rev. 0 to Rev. A Change to 0.1 Hz to 10 Hz Voltage Noise Parameter Heading, Changed Integrated Data Acquisition System to Module, Table 4 .................................................................................................8 Subsystem to Module Data Acquisition System, Subsystems to Changes to Human Body Model (HBM) Parameter and Module Data Acquisition Systems, and DAQ Subsystem to Endnote 4, Table 7 .......................................................................... 14 Module Data Acquisition System .............................. Throughout Change to Figure 27 Caption ........................................................ 21 Changes to Features Section and Table 1 Title ............................. 1 Changes to Circuit Information Section ..................................... 27 Moved General Description Section .............................................. 3 Change to Table 15 Title ................................................................ 45 Changes to General Description Section ...................................... 3 Change to 0.1 Hz to 10 Hz Voltage Noise Parameter Heading, 3/2017Revision 0: Initial Version Table 2 ................................................................................................ 4 Rev. A Page 2 of 49