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ADAU1702JSTZ

ADAU1702JSTZ electronic component of Analog Devices

Datasheet
Audio DSPs 28-/56-Bit Audio Processor

Manufacturer: Analog Devices
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1: USD 15.9802 ea
Line Total: USD 15.98

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MOQ: 1  Multiples: 1
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ADAU1702JSTZ
Analog Devices

1 : USD 15.5625
10 : USD 13.4964
25 : USD 12.8683
80 : USD 11.1734
230 : USD 10.6713
440 : USD 9.7296
945 : USD 8.4742

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ADAU1702JSTZ
Analog Devices

1 : USD 16.4473
10 : USD 14.2884
25 : USD 13.6206
100 : USD 11.3764
250 : USD 10.8675
500 : USD 9.9104
1000 : USD 9.0381

     
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SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs Data Sheet ADAU1702 FEATURES GENERAL DESCRIPTION 28-/56-bit, 25 MIPS digital audio processor The ADAU1702 is a complete single-chip audio system with a 2 ADCs: SNR of 100 dB, THD + N of 83 dB 28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like 4 DACs: SNR of 104 dB, THD + N of 90 dB control interfaces. Signal processing includes equalization, cross- Complete standalone operation over, bass enhancement, multiband dynamics processing, delay Self-boot from serial EEPROM compensation, speaker compensation, and stereo image widening. Auxiliary ADC with 4-input mux for analog control This processing can be used to compensate for real-world GPIOs for digital controls and outputs limitations of speakers, amplifiers, and listening environments, Fully programmable with SigmaStudio graphical tool providing dramatic improvements in perceived audio quality. 28-bit 28-bit multiplier with 56-bit accumulator for full Its signal processing is comparable to that found in high end double precision processing studio equipment. Most processing is done in full 56-bit, double Clock oscillator for generating master clock from crystal precision mode, resulting in very good low level signal perfor- PLL for generating a master clock from 64 f , 256 f , S S mance. The ADAU1702 is a fully programmable DSP. The easy to 384 f , or 512 f clocks S S use SigmaStudio software allows the user to graphically configure 2 Flexible serial data input/output ports with I S-compatible, a custom signal processing flow using blocks such as biquad filters, left-justified, right-justified, and TDM modes dynamics processors, level controls, and GPIO interface controls. Sampling rates of up to 192 kHz are supported ADAU1702 programs can be loaded on power-up either from a On-chip voltage regulator for compatibility with 3.3 V systems serial EEPROM through its own self-boot mechanism or from 48-lead, plastic LQFP an external microcontroller. On power-down, the current state APPLICATIONS of the parameters can be written back to the EEPROM from the Multimedia speaker systems ADAU1702 to be recalled the next time the program is run. MP3 player speaker docks Two - ADCs and four - DACs provide a 98.5 dB analog Automotive head units input to analog output dynamic. Each ADC has a THD + N of Minicomponent stereos 83 dB, and each DAC has a THD + N of 90 dB. Digital input Digital televisions and output ports allow a glueless connection to additional Studio monitors ADCs and DACs. The ADAU1702 communicates through an Speaker crossovers 2 I C bus or a 4-wire SPI port. Musical instrument effects processors In-seat sound systems (aircraft/motor coaches) Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20072016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com ADAU1702 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Parameter RAM .......................................................................... 30 Applications ....................................................................................... 1 Data RAM ................................................................................... 30 General Description ......................................................................... 1 Read/Write Data Formats ......................................................... 30 Revision History ............................................................................... 3 Control Register Map ..................................................................... 32 Functional Block Diagram .............................................................. 4 Control Register Details ................................................................ 34 Specifications ..................................................................................... 5 Address 2048 to Address 2055 (0x0800 to 0x0807)Interface Registers ....................................................................................... 34 Analog Performance .................................................................... 5 Address 2056 (0x0808)GPIO Pin Setting Register ............ 35 Digital Input/Output .................................................................... 6 Address 2057 to Address 2060 (0x0809 to 0x080C) Power .............................................................................................. 6 Auxiliary ADC Data Registers.................................................. 36 PLL and Oscillator ........................................................................ 6 Address 2064 to Address 2068 (0x0810 to 0x0814)Safeload Regulator........................................................................................ 6 Data Registers ............................................................................. 37 Digital Timing Specifications ..................................................... 7 Address 2069 to Address 2073 (0x0815 to 0x0819)Safeload Absolute Maximum Ratings .......................................................... 10 Address Registers ....................................................................... 37 Thermal Resistance .................................................................... 10 Address 2074 to Address 2075 (0x081A to 0x081B)Data Capture Registers........................................................................ 38 ESD Caution ................................................................................ 10 Address 2076 (0x081C)DSP Core Control Register .......... 39 Pin Configuration and Function Descriptions ........................... 11 Address 2078 (0x081E)Serial Output Control Register .... 40 Typical Performance Characteristics ........................................... 14 Address 2079 (0x081F)Serial Input Control Register ....... 41 System Block Diagram ................................................................... 15 Address 2080 to Address 2081 (0x0820 to 0x0821) Theory of Operation ...................................................................... 16 Multipurpose Pin Configuration Registers ............................ 42 Initialization .................................................................................... 17 Address 2082 (0x0822)Auxiliary ADC and Power Control Power-Up Sequence ................................................................... 17 Register ........................................................................................ 43 Control Registers Setup ............................................................. 17 Address 2084 (0x0824)Auxiliary ADC Enable Register ... 43 Recommended Program/Parameter Loading Procedure ..... 17 Address 2086 (0x0826)Oscillator Power-Down Register . 43 Power Reduction Modes ............................................................ 18 Address 2087 (0x0827)DAC Setup ...................................... 44 Using the Oscillator .................................................................... 18 Multipurpose Pins .......................................................................... 45 Setting Master Clock/PLL Mode .............................................. 18 Auxiliary ADC ............................................................................ 45 Voltage Regulator ....................................................................... 19 General-Purpose Input/Output Pins ....................................... 45 Audio ADCs .................................................................................... 20 Serial Data Input/Output Ports ................................................ 45 Audio DACs .................................................................................... 21 Layout Recommendations ............................................................. 48 Control Ports ................................................................................... 22 Parts Placement .......................................................................... 48 2 I C Port......................................................................................... 23 Grounding ................................................................................... 48 SPI Port ........................................................................................ 26 Typical Application Schematics .................................................... 49 Self-Boot ...................................................................................... 27 Self-Boot Mode ........................................................................... 49 Signal Processing ............................................................................ 29 2 I C Control .................................................................................. 50 Numeric Formats ........................................................................ 29 SPI Control .................................................................................. 51 Programming .............................................................................. 29 Outline Dimensions ....................................................................... 52 RAMs and Registers ....................................................................... 30 Ordering Guide .......................................................................... 52 Address Maps .............................................................................. 30 Rev. D Page 2 of 52

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