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ADM1275-3ARQZ-R7

ADM1275-3ARQZ-R7 electronic component of Analog Devices

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Hot Swap Voltage Controllers Low volt Positive Hot Swap + Power mon

Manufacturer: Analog Devices
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ADM1275-3ARQZ-R7
Analog Devices

1 : USD 22.49
10 : USD 21.021
25 : USD 19.6
100 : USD 17.5625
250 : USD 16.8875
500 : USD 16.05
1000 : USD 15.675

     
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Hot-Swap Controller and Digital Power Monitor with PMBus Interface Data Sheet ADM1275 FEATURES APPLICATIONS DIAGRAM R SENSE Q Controls supply voltages from 2 V to 20 V 2V TO 20V 1 370 ns response time to short circuit SENSE+ SENSE 2.95V TO Resistor-programmable 5 mV to 25 mV current limit 20V VCC + ADM1275-1 50 1% accurate, 12-bit ADC for current, V /V readback IN OUT VCAP CHARGE LDO PUMP Charge-pumped gate drive for multiple external N-channel FETs IOUT V UV CP High gate drive voltage to ensure lowest R + DSON GATE 1.0V DRIVE/ GATE LOGIC Foldback for tighter FET SOA protection OV VOUT TIMEOUT 1.0V Automatic retry or latch-off on current fault + + CURRENT ISET REF LIMIT TIMER Programmable current limit timer for SOA SELECT ON 1.0V Programmable, multifunction GPOs CURRENT V LIMIT CBOS SS Power-good status output CONTROL TIMER FLB Analog UV and OV protection ON TIMER ENABLE pin (ADM1275-3 only) TIMER TIMEOUT PWRGD Peak detect registers for current and voltage GPO1/ALERT1/CONV GPO2/ALERT2 LOGIC SENSE+ 12-BIT PMBus fast mode compliant interface AND LATCH VOUT ADC PMBus SCL IOUT 16-lead QSOP and 20-lead QSOP and LFCSP SDA ADR GND APPLICATIONS Power monitoring and control/power budgeting Figure 1. Central office equipment Telecommunication and data communication equipment PCs/servers GENERAL DESCRIPTION The ADM1275 is a hot-swap controller that allows a circuit board In case of a short-circuit event, a fast internal overcurrent to be removed from or inserted into a live backplane. It also features detector responds within 370 ns and signals the gate to shut current and voltage readback via an integrated 12-bit analog-to- down. A 1500 mA pull-down device ensures a fast FET response. digital converter (ADC), accessed using a PMBus interface. The ADM1275 features overvoltage and undervoltage protection, The load current is measured using an internal current sense programmed using external resistor dividers on the UV and OV amplifier that measures the voltage across a sense resistor in the pins. A PWRGD signal can be used to detect when the output power path via the SENSE+ and SENSE pins. A default limit of supply is valid, using the FLB pin to monitor the output. GPO pins can be configured as various output signals that can be asserted 20 mV is set, but this limit can be adjusted, if required, using a resistor divider network from the internal reference voltage to when a programmed current or voltage level is reached. the ISET pin. The 12-bit ADC can measure the current in the sense resistor, as The ADM1275 limits the current through the sense resistor by well as the supply voltage on the SENSE+ pin or the output voltage. controlling the gate voltage of an external N-channel FET in the A PMBus interface allows a controller to read current and voltage power path, via the GATE pin. The sense voltageand, therefore, data from the ADC. Measurements can be initiated by a PMBus the load currentis maintained below the preset maximum. The command. Alternatively, the ADC can run continuously, and the ADM1275 protects the external FET by limiting the time that the user can read the latest conversion data whenever required. Up FET remains on while the current is at its maximum value. This to four unique PMBus addresses can be selected, depending on current limit time is set by the choice of capacitor connected to the way that the ADR pin is connected. the TIMER pin. In addition, a foldback resistor network can be The ADM1275-1 and ADM1275-3 are available in a 20-lead QSOP used to actively lower the current limit as the voltage across the LATCH and 20-lead LFCSP and have a pin that can be configured FET is increased. This helps to maintain constant power in the for automatic retry or latch-off when an overcurrent fault occurs. FET and allows the safe operating area (SOA) to be adhered to The ADM1275-2 is available in a 16-lead QSOP with latch-off in an effective manner. mode only. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 08931-001ADM1275 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Status Commands ...................................................................... 30 Applications ....................................................................................... 1 GPO and Alert Pin Setup Commands .................................... 31 Applications Diagram ...................................................................... 1 Power Monitor Commands ...................................................... 31 General Description ......................................................................... 1 Warning Limit Setup Commands ............................................ 32 Revision History ............................................................................... 3 PMBus Direct Format Conversion .......................................... 32 Specif icat ions ..................................................................................... 4 Voltage and Current Conversion using LSB values ............... 33 Serial Bus Timing Characteristics .............................................. 7 ADM1275 Alert Pin Behavior ...................................................... 34 Absolute Maximum Ratings ............................................................ 8 Faults and Warnings .................................................................. 34 Thermal Characteristics .............................................................. 8 Generating an Alert ................................................................... 34 ESD Caution .................................................................................. 8 Handling/Clearing an Alert ...................................................... 34 Pin Configurations and Function Descriptions ........................... 9 SMBus Alert Response Address ............................................... 35 Typical Performance Characteristics ........................................... 14 Example Use of SMBus Alert Response Address ................... 35 Functional Block Diagrams ........................................................... 20 PMBus Command Reference ........................................................ 36 Theory of Operation ...................................................................... 21 OPERATION .............................................................................. 37 Powering the ADM1275 ............................................................ 21 CLEAR FAULTS ........................................................................ 37 Current Sense Inputs .................................................................. 21 CAPABILITY .............................................................................. 37 Current Limit Reference ............................................................ 22 VOUT OV WARN LIMIT ..................................................... 37 Setting the Current Limit (ISET) ............................................. 22 VOUT UV WARN LIMIT ..................................................... 37 Soft Start ...................................................................................... 23 IOUT OC WARN LIMIT ...................................................... 37 Foldback ....................................................................................... 23 IOUT WARN2 LIMIT ............................................................. 38 Timer ............................................................................................ 24 VIN OV WARN LIMIT ......................................................... 38 Hot-Swap Retry Duty Cycle ...................................................... 24 VIN UV WARN LIMIT ......................................................... 38 FET Gate Drive Clamps ............................................................. 24 STATUS BYTE .......................................................................... 38 Fast Response to Severe Overcurrent ...................................... 25 STATUS WORD ........................................................................ 39 Undervoltage and Overvoltage ................................................. 25 STATUS VOUT ......................................................................... 39 ENABLE Input (ADM1275-3 Only) ........................................ 25 STATUS IOUT .......................................................................... 39 Power Good ................................................................................. 25 STATUS INPUT ........................................................................ 40 VOUT Measurement ................................................................. 26 STATUS MFR SPECIFIC ........................................................ 40 FET Health .................................................................................. 26 READ VIN ................................................................................. 40 Power Monitor ............................................................................ 26 READ VOUT ............................................................................. 41 PMBus Interface ............................................................................. 27 READ IOUT .............................................................................. 41 Device Addressing ...................................................................... 27 PMBUS REVISION .................................................................. 41 SMBus Protocol Usage ............................................................... 27 MFR ID ....................................................................................... 41 Packet Error Checking ............................................................... 27 MFR MODEL ............................................................................ 41 2 Partial Transactions on I C Bus ................................................ 27 MFR REVISION ........................................................................ 42 SMBus Message Formats ........................................................... 28 PEAK IOUT ............................................................................... 42 Group Commands ...................................................................... 29 PEAK VIN.................................................................................. 42 Hot-Swap Control Commands ................................................. 30 PEAK VOUT ............................................................................. 42 ADM1275 Information Commands ........................................ 30 PMON CONTROL ................................................................... 42 Rev. E Page 2 of 48

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8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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