Ultracompact, 3 A Thermoelectric Cooler (TEC) Controller Data Sheet ADN8835 FEATURES FUNCTIONAL BLOCK DIAGRAM VLIM/ High efficiency single inductor architecture VDD SD ILIM VTEC ITEC PVINx Integrated low RDSON MOSFETs for the TEC controller ADN8835 ERROR TEC voltage and current operation monitoring AMP TEC DRIVER IN1P TEC CURRENT No external sense resistor required AND VOLTAGE SENSE AND LIMIT IN1N Independent TEC heating and cooling current-limit settings LDR LINEAR Programmable maximum TEC voltage POWER OUT1 STAGE 2.0 MHz (typical) PWM driver switching frequency TMPGND COMP External synchronization AMP IN2P Two integrated, zero-drift, rail-to-rail chopper amplifiers CONTROLLER SW IN2N PWM Compatible with NTC or RTD thermal sensors POWER STAGE 2.50 V reference output with 1% accuracy SFB OUT2 Temperature lock indicator Available in a 36-lead, 6 mm 6 mm LFCSP VOLTAGE OSCILLATOR REFERENCE APPLICATIONS TEC temperature control AGND VREF EN/SY PGNDx Optical modules Optical fiber amplifiers Figure 1. Optical networking systems Instruments requiring TEC temperature control GENERAL DESCRIPTION 1 The ADN8835 is a monolithic TEC controller with an integrated The temperature control loop of the ADN8835 is stabilized by TEC controller. It has a linear power stage, a pulse-width PID compensation utilizing the built in, zero-drift chopper modulation (PWM) power stage, and two zero-drift, rail-to-rail amplifiers. The internal 2.50 V reference voltage provides a 1% chopper amplifiers. The linear controller works with the PWM accurate output that biases a thermistor temperature sensing driver to control the internal power MOSFETs in an H bridge bridge as well as a voltage divider network to program the maximum TEC current and voltage limits for both the heating and configuration. By measuring the thermal sensor feedback voltage and using the integrated operational amplifiers as a cooling modes. With the zero-drift chopper amplifiers, excellent proportional integral differential (PID) compensator to condition long-term temperature stability is maintained via an autonomous the signal, the ADN8835 drives current through a TEC to settle analog temperature control loop. the temperature of a laser diode or a passive component attached Table 1. TEC Family Models to the TEC module to the programmed target temperature. Device No. MOSFET Thermal Loop Package The ADN8835 supports negative temperature coefficient ADN8831 Discrete Digital/analog LFCSP (CP-32-7) (NTC) thermistors as well as positive temperature coefficient ADN8833 Integrated Digital WLCSP (CB-25-7), (PTC) resistive temperature detectors (RTDs). The target LFCSP (CP-24-15) temperature is set as an analog voltage input either from a ADN8834 Integrated Digital/analog WLCSP (CB-25-7), digital-to-analog converter (DAC) or from an external resistor LFCSP (CP-24-15) divider. ADN8835 Integrated Digital/analog LFCSP (CP-36-5) 1 Product is covered by U.S. Patent No. 6,486,643. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 14174-001ADN8835 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 TEC Voltage/Current Monitor ................................................. 16 Applications ....................................................................................... 1 Maximum TEC Voltage Limit .................................................. 16 Functional Block Diagram .............................................................. 1 Maximum TEC Current Limit ................................................. 16 General Description ......................................................................... 1 Applications Information .............................................................. 18 Revision History ............................................................................... 2 Signal Flow .................................................................................. 18 Detailed Functional Block Diagram .............................................. 3 Thermistor Setup ........................................................................ 18 Specifications ..................................................................................... 4 Thermistor Amplifier (Chopper 1) .......................................... 19 Absolute Maximum Ratings ............................................................ 7 PID Compensation Amplifier (Chopper 2) ............................ 19 Thermal Resistance ...................................................................... 7 MOSFET Driver Amplifiers ...................................................... 20 Maximum Power Dissipation ..................................................... 7 PWM Output Filter Requirements .......................................... 20 ESD Caution .................................................................................. 7 Input Capacitor Selection .......................................................... 21 Pin Configuration and Function Descriptions ............................. 8 Power Dissipation....................................................................... 21 Typical Performance Characteristics ............................................. 9 Thermal Consideration ............................................................. 22 Theory of Operation ...................................................................... 13 PCB Layout Guidelines .................................................................. 23 Analog PID Control ................................................................... 14 Block Diagrams and Signal Flow ............................................. 23 Digital PID Control .................................................................... 14 Guidelines for Reducing Noise and Minimizing Power Loss23 Powering the Controller ............................................................ 14 Example PCB Layout Using Two Layers ................................. 24 Enable and Shutdown ................................................................ 15 Outline Dimensions ....................................................................... 27 Oscillator Clock Frequency ....................................................... 15 Ordering Guide .......................................................................... 27 Temperature Lock Indicator ..................................................... 15 Soft Start on Power-Up .............................................................. 15 REVISION HISTORY 9/2018Rev. A to Rev. B Added Patent Information ................................................................. 1 Changes to Specifications, Table 2, Voltage Measurement Accuracy Parameter ......................................................................... 6 5/2017Rev. 0 to Rev. A Changes to PID Compensation Amplifier (Chopper 2) Section... 18 Changes to Ordering Guide .......................................................... 26 12/2016Revision 0: Initial Version Rev. B Page 2 of 27