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ADRF6720ACPZ-R7

ADRF6720ACPZ-R7 electronic component of Analog Devices

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Modulator / Demodulator Wideband Integ Mod Protected RS-490

Manufacturer: Analog Devices
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ADRF6720ACPZ-R7
Analog Devices

1 : USD 14.9287
10 : USD 13.4136
25 : USD 13.068
50 : USD 12.582
100 : USD 11.7828
250 : USD 11.1888
500 : USD 11.1672
750 : USD 10.5192
N/A

Obsolete
     
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Wideband Quadrature Modulator with Integrated Fractional-N PLL and VCOs Data Sheet ADRF6720 FEATURES GENERAL DESCRIPTION I/Q modulator with integrated fractional-N PLL The ADRF6720 is a wideband quadrature modulator with an RF output frequency range: 700 MHz to 3000 MHz integrated synthesizer ideally suited for 3G and 4G Internal LO frequency range: 356.25 MHz to 2855 MHz communication systems. The ADRF6720 consists of a high Output P1dB: 12.2 dBm at 2140 MHz linearity broadband modulator, an integrated fractional-N Output IP3: 32.6 dBm at 2140 MHz phase-locked loop (PLL), and four low phase noise multicore Carrier feedthrough: 40.3 dBm at 2140 MHz voltage controlled oscillators (VCOs). Sideband suppression: 37.6 dBc at 2140 MHz The ADRF6720 local oscillator (LO) signal can be generated Noise floor: 157.9 dBm/Hz at 2140 MHz internally via the on-chip integer-N and fractional-N Baseband 1 dB modulation bandwidth: >1000 MHz synthesizers, or externally via a high frequency, low phase noise Baseband input bias level: 0.5 V LO signal. The internal integrated synthesizer enables LO Power supply: 3.3 V/425 mA coverage from 356.25 MHz to 2855 MHz using the multicore Integrated RF tunable balun allowing single-ended RF output VCOs. In the case of internal LO generation or external LO Multicore integrated VCOs input, quadrature signals are generated with a divide-by-2 phase HD3/IP3 optimization splitter. When the ADRF6720 is operated with an external 1 Sideband suppression and carrier feedthrough optimization LO input, a polyphase filter generates the quadrature inputs to High-side/low-side LO injection the mixer. Programmable via 3-wire serial port interface (SPI) The ADRF6720 offers digital programmability for carrier 40-lead 6 mm 6 mm LFCSP feedthrough optimization, sideband suppression, HD3/IP3 APPLICATIONS optimization, and high-side or low-side LO injection. 2G/3G/4G/LTE broadband communication systems The ADRF6720 is fabricated using an advanced silicon- Microwave point-to-point radios germanium BiCMOS process. It is available in a 40-lead, Satellite modems RoHS-compliant, 6 mm 6 mm LFCSP package with an Military/aerospace exposed pad. Performance is specified over the 40C to +85C Instrumentation temperature range. FUNCTIONAL BLOCK DIAGRAM VPOSx 40 35 30 26 22 17 11 6 I+ 3 27 ENBL ADRF6720 V TO I PHASE I 4 LO NULLING CORRECTION DAC 24 RFOUT LO NULLING DAC PHASE 8 CORRECTION Q V TO I 18 LOOUT+ Q+ 9 19 LOOUT 39 REFIN PLL 36 CP QUAD DIVIDER VTUNE 32 LOIN 33 15 CS 34 LOIN+ SERIAL POLYPHASE LDO LDO 14 SCLK PORT FILTER 2.5V VCO INTERFACE 13 SDIO 2 5 7 10 16 20 23 25 29 37 38 12 28 31 DECL1 DECL2 DECL3 GND Figure 1. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 12134-001ADRF6720 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Baseband Inputs ......................................................................... 24 Applications ....................................................................................... 1 LO Input ...................................................................................... 24 General Description ......................................................................... 1 Loop Filter ................................................................................... 24 Revision History ............................................................................... 2 RF Output .................................................................................... 24 Specifications ..................................................................................... 3 Applications Information .............................................................. 25 Timing Characteristics ................................................................ 7 DAC-to-I/Q Modulator Interfacing ......................................... 25 Absolute Maximum Ratings ............................................................ 8 Baseband Bandwidth ................................................................. 25 Thermal Resistance ...................................................................... 8 Carrier Feedthrough Nulling .................................................... 26 ESD Caution .................................................................................. 8 Sideband Suppression Optimization ....................................... 26 Pin Configuration and Function Descriptions ............................. 9 Linearity ....................................................................................... 27 Typical Performance Characteristics ........................................... 11 LO Amplitude and Common Mode Voltage .......................... 27 Theory of Operation ...................................................................... 18 Layout ........................................................................................... 27 LO Generation Block .................................................................. 18 Characterization Setups ................................................................. 29 Baseband ...................................................................................... 21 Register Map ................................................................................... 31 Active Mixers .............................................................................. 21 Register Details ............................................................................... 32 Serial Port Interface .................................................................... 22 Outline Dimensions ....................................................................... 42 Basic Connections for Operation ................................................. 23 Ordering Guide .......................................................................... 42 Power Supply and Grounding ................................................... 23 REVISION HISTORY 4/14Revision 0: Initial Version Rev. 0 Page 2 of 44

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Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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