3-Axis, 1g/2g/4g/8g Digital Accelerometer Data Sheet ADXL350 FEATURES GENERAL DESCRIPTION Excellent zero-g bias accuracy and stability with The high performance ADXL350 is a small, thin, low power, minimum/maximum specifications 3-axis accelerometer with high resolution (13-bit) and selectable Ultralow power: as low as 45 A in measurement mode and measurement ranges up to 8 g. The ADXL350 offers industry- 0.1 A in standby mode at V = 2.5 V (typical) S leading noise and temperature performance for application Power consumption scales automatically with bandwidth robustness with minimal calibration. Digital output data is User-selectable resolution formatted as 16-bit twos complement and is accessible through 2 Fixed 10-bit resolution either a SPI (3- or 4-wire) or I C digital interface. Full resolution, where resolution increases with g range, The ADXL350 is well suited for high performance portable up to 13-bit resolution at 8 g (maintains 2 mg/LSB scale applications. It measures the static acceleration of gravity in tilt- factor in all g ranges) sensing applications, as well as dynamic acceleration resulting Embedded, 32-level FIFO buffer minimizes host processor from motion or shock. Its high resolution (2 mg/LSB) enables load measurement of inclination changes of less than 1.0. Tap/double tap detection and free-fall detection Several special sensing functions are provided. Activity and Activity/inactivity monitoring inactivity sensing detect the presence or lack of motion and if Supply voltage range: 2.0 V to 3.6 V the acceleration on any axis exceeds a user-set level. Tap sensing I/O voltage range: 1.7 V to V S 2 detects single and double taps. Free-fall sensing detects if the SPI (3- and 4-wire) and I C digital interfaces device is falling. These functions can be mapped to one of two Flexible interrupt modes mappable to either interrupt pin interrupt output pins. Measurement ranges selectable via serial command Bandwidth selectable via serial command Low power modes enable intelligent motion-based power Wide temperature range (40C to +85C) management with threshold sensing and active acceleration 10,000 g shock survival measurement at extremely low power dissipation. Pb-free/RoHS compliant The ADXL350 is supplied in a small, thin, 3 mm 4 mm Small and thin: 4 mm 3 mm 1.2 mm cavity LGA package 1.2 mm, 16-lead cavity laminate package. APPLICATIONS Portable consumer devices High performance medical and industrial applications FUNCTIONAL BLOCK DIAGRAM V V S DD I/O ADXL350 POWER MANAGEMENT INT1 CONTROL SENSE ADC AND DIGITAL ELECTRONICS INTERRUPT FILTER 3-AXIS LOGIC INT2 SENSOR SDA/SDI/SDIO 32 LEVEL SERIAL I/O FIFO SDO/ALT ADDRESS SCL/SCLK GND CS Figure 1. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2012 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 10271-001ADXL350 Data Sheet TABLE OF CONTENTS Interrupts ..................................................................................... 21 Features .............................................................................................. 1 FIFO ............................................................................................. 21 Applications ....................................................................................... 1 Self-Test ....................................................................................... 22 General Description ......................................................................... 1 Register Map ................................................................................... 23 Functional Block Diagram .............................................................. 1 Register Definitions ................................................................... 24 Revision History ............................................................................... 2 Applications Information .............................................................. 28 Specifications ..................................................................................... 3 Power Supply Decoupling ......................................................... 28 Absolute Maximum Ratings ............................................................ 4 Mechanical Considerations for Mounting .............................. 28 Thermal Resistance ...................................................................... 4 Tap Detection .............................................................................. 28 Package Information .................................................................... 4 Threshold .................................................................................... 29 ESD Caution .................................................................................. 4 Link Mode ................................................................................... 29 Pin Configuration and Function Descriptions ............................. 5 Sleep Mode vs. Low Power Mode............................................. 29 Typical Performance Characteristics ............................................. 6 Offset Calibration ....................................................................... 29 Theory of Operation ...................................................................... 14 Using Self-Test ............................................................................ 30 Power Sequencing ...................................................................... 14 Axes of Acceleration Sensitivity ............................................... 32 Power Savings.............................................................................. 15 Layout and Design Recommendations ................................... 33 Serial Communications ................................................................. 16 Outline Dimensions ....................................................................... 34 SPI ................................................................................................. 16 2 Ordering Guide .......................................................................... 34 I C ................................................................................................. 19 REVISION HISTORY 9/12Revision 0: Initial Version Rev. 0 Page 2 of 36