DS1558 Watchdog Clock with NV RAM Control www.maxim-ic.com FEATURES PIN CONFIGURATION Integrated Real-Time Clock (RTC), Power- TOP VIEW Fail Control Circuit, and NV RAM Controller Clock Registers are Accessed Identically to the Static RAM These Registers are Resident N.C. 1 36 A15 in the 16 Top RAM Locations A18 2 35 V BAT1 A16 3 34 Century Register WE A14 4 33 IRQ/FT Greater than 10 Years of Timekeeping and A12 5 32 A13 A7 6 A8 31 DS1558 Data Retention in the Absence of Power with 7 A6 30 A9 8 A5 29 A11 Small Lithium Coin Cell(s) and Low-Leakage 9 A4 28 OE 10 SRAM A3 27 A10 11 A2 26 CE Precision Power-On Reset 12 A1 25 OER Programmable Watchdog Timer and RTC Alarm BCD-Coded Year, Month, Date, Day, Hours, Minutes, and Seconds with Automatic Leap- TQFP Year Compensation Valid Up to the Year 2100 Battery Voltage-Level Indicator Flag Power-Fail Write Protection Allows for 10% V Power-Supply Tolerance CC Underwriters Laboratory (UL) Recognized ORDERING INFORMATION VOLTAGE PART TEMP RANGE PIN-PACKAGE TOP MARK* (V) DS1558W -40C to +85C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D DS1558W+ -40C to +85C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D DS1558W-TRL -40C to +85C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D DS1558W+TRL -40C to +85C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D DS1558Y -40C to +85C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B DS1558Y+ -40C to +85C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B DS1558Y-TRL -40C to +85C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B DS1558Y+TRL -40C to +85C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B + Denotes a lead(Pb)-free/RoHS-compliant device. * A + anywhere on the top mark indicates a lead-free device. Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. 1 of 18 REV: 071305 13 N.C. 48 GND 14 A0 47 X1 15 DQ0 X2 46 16 DQ1 45 GND 17 DQ2 44 A17 18 GND 43 N.C. 19 DQ3 42 V CC 20 DQ4 41 N.C. 21 DQ5 40 V CCO 22 DQ6 39 N.C. 23 DQ7 38 RST 24 CER 37 V BAT2DS1558 PIN DESCRIPTION PIN NAME FUNCTION 1, 13, 39 N.C. No Connection 41, 43 2 A18 3 A16 4 A14 5 A12 6 A7 7 A6 8 A5 9 A4 10 A3 Address Inputs for Address Decode. The DS1558 uses the address inputs to determine 11 A2 whether or not a read or write cycle should be directed to the attached SRAM or to the RTC registers. 12 A1 14 A0 27 A10 29 A11 30 A9 31 A8 32 A13 36 A15 44 A17 15 DQ0 16 DQ1 17 DQ2 19 DQ3 Data Input/Outputs. Data input/output pins for the RTC registers. 20 DQ4 21 DQ5 22 DQ6 23 DQ7 18, 45, GND Ground 48 Active-Low Chip-Enable RAM. CE is passed through to CER, with an added 24 CER propagation delay. When the signals on A0A18 match an RTC address, CER is held high, disabling the SRAM. If OE is also low, the RTC outputs data on DQ0DQ7. Active-Low Output-Enable RAM. OE is passed through to OER, with an added OER 25 propagation delay. When the signals on A0A18 match an RTC address, CER is held high, disabling the SRAM. If CE is also low, the RTC outputs data on DQ0DQ7. 26 CE Active-Low Chip-Enable Input. Used to access the RTC and the external SRAM. 28 OE Active-Low Output-Enable Input. Used to access the RTC and the external SRAM. Active-Low Interrupt/Frequency-Test Output. This pin is used to output the alarm 33 IRQ/FT interrupt or the frequency test signal. It is open drain and requires an external pullup resistor. 34 WE Active-Low Write Enable. Used to write data to the RTC registers. 2 of 18