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EVAL-ADF7012DBZ1

EVAL-ADF7012DBZ1 electronic component of Analog Devices

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Sub-GHz Development Tools ADF7012 Daughter Board(902-928 MHz - US)

Manufacturer: Analog Devices
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1: USD 77.9464 ea
Line Total: USD 77.95

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EVAL-ADF7012DBZ1
Analog Devices

1 : USD 95.2031

     
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Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter ADF7012 FEATURES GENERAL DESCRIPTION Single-chip, low power UHF transmitter The ADF7012 is a low power FSK/GFSK/OOK/GOOK/ASK 75 MHz to 1 GHz frequency operation UHF transmitter designed for short-range devices (SRDs). The Multichannel operation using fractional-N PLL output power, output channels, deviation frequency, and mod- 2.3 V to 3.6 V operation ulation type are programmable by using four, 32-bit registers. On-board regulator The fractional-N PLL and VCO with external inductor enable Programmable output power the user to select any frequency in the 75 MHz to 1 GHz band. 16 dBm to +14 dBm, 0.4 dB steps The fast lock times of the fractional-N PLL make the ADF7012 Data rates: dc to 179.2 kbps suitable in fast frequency hopping systems. The fine frequency Low current consumption deviations available and PLL phase noise performance facilitates 868 MHz, 10 dBm, 21 mA narrow-band operation. 433 MHz, 10 dBm, 17 mA There are five selectable modulation schemes: binary frequency 315 MHz, 0 dBm, 10 mA shift keying (FSK), Gaussian frequency shift keying (GFSK), Programmable low battery voltage indicator binary on-off keying (OOK), Gaussian on-off keying (GOOK), 24-lead TSSOP and amplitude shift keying (ASK). In the compensation register, the output can be moved in <1 ppm steps so that indirect com- APPLICATIONS pensation for frequency error in the crystal reference can be made. Low cost wireless data transfer A simple 3-wire interface controls the registers. In power-down, Security systems the part has a typical quiescent current of <0.1 A. RF remote controls Wireless metering Secure keyless entry FUNCTIONAL BLOCK DIAGRAM PRINTED INDUCTOR CLK C OUT VCO OSC1 OSC2 L1 L2 V DD OOK ASK CLK VCO RF OUT PA R PFD/ RF GND DV DD CHARGE PUMP DGND C REG LDO REGULATOR +FRACTIONAL N OOK ASK TxCLK - TxDATA FSK GFSK PLL LOCK DETECT MUXOUT LE FREQUENCY MUXOUT COMPENSATION SERIAL R SET DATA BATTERY INTERFACE CENTER MONITOR FREQUENCY CLK CE AGND Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20072009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 04617-0-001ADF7012 TABLE OF CONTENTS Features .............................................................................................. 1 GFSK Modulation ...................................................................... 14 Applications ....................................................................................... 1 Power Amplifier ......................................................................... 14 General Description ......................................................................... 1 GOOK Modulation .................................................................... 15 Functional Block Diagram .............................................................. 1 Output Divider ........................................................................... 16 Revision History ............................................................................... 2 MUXOUT Modes....................................................................... 16 Specif icat ions ..................................................................................... 3 Theory of Operation ...................................................................... 17 Timing Characteristics ..................................................................... 5 Choosing the External Inductor Value .................................... 17 Absolute Maximum Ratings ............................................................ 6 Choosing the Crystal/PFD Value ............................................. 17 Transistor Count ........................................................................... 6 Tips on Designing the Loop Filter ........................................... 18 ESD Caution .................................................................................. 6 PA Matching ................................................................................ 18 Pin Configuration and Function Descriptions ............................. 7 Transmit Protocol and Coding Considerations ..................... 18 Typical Performance Characteristics ............................................. 8 Application Examples .................................................................... 19 315 MHz ........................................................................................ 8 315 MHz Operation ................................................................... 20 433 MHz ........................................................................................ 9 433 MHz Operation ................................................................... 21 868 MHz ...................................................................................... 10 868 MHz Operation ................................................................... 22 Circuit Description ......................................................................... 12 915 MHz Operation ................................................................... 23 PLL Operation ............................................................................ 12 Register Descriptions ..................................................................... 24 Crystal Oscillator ........................................................................ 12 Register 0: R Register ................................................................. 24 Crystal Compensation Register ................................................ 12 Register 1: N-Counter Latch ..................................................... 25 Clock Out Circuit ....................................................................... 12 Register 2: Modulation Register ............................................... 26 Loop Filter ................................................................................... 13 Register 3: Function Register .................................................... 27 Voltage-Controlled Oscillator (VCO) ..................................... 13 Outline Dimensions ....................................................................... 28 Voltage Regulators ...................................................................... 13 Ordering Guide .......................................................................... 28 FSK Modulation .......................................................................... 13 REVISION HISTORY 6/09Rev. 0 to Rev. A Updated Format .................................................................. Universal Changes to Table 4 ............................................................................ 7 Changes to Crystal Oscillator Section ......................................... 12 Changes to Loop Filter Section ..................................................... 13 Changes to GFSK Modulation Section ........................................ 14 Changes to Choosing the External Inductor Value Section ..... 17 Changes to Component ValuesCrystal: 3.6864 MHz ............ 20 Changes to Component ValuesCrystal: 4.9152 MHz ............ 21 Changes to Component ValuesCrystal: 4.9152 MHz ............ 22 Changes to Component ValuesCrystal: 10 MHz .................... 23 Added Register Headings Throughout ........................................ 24 Changes to Ordering Guide .......................................................... 28 10/04Revision 0: Initial Version Rev. A Page 2 of 28

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