CD64 Apex Microtechnology

CD64 RoHS High Voltage Power Booster COMPLIANT FEATURES Wide Supply Range 25 V to 75 V High Output Current Up to 3.5 A Continuous Programmable Gain Separate Supplies for Amplifier Core and Output Stage High Slew Rate 400 V/s Typical Programmable Output Current Limit High Power Bandwidth 600 kHz Low Quiescent Current 10 mA per Channel Two Amplifier Channels, Fully Independent APPLICATIONS LED Test Equipment LCD Test Equipment Semiconductor Test Equipment High Voltage Instrumentation Electrostatic Transducers and Deflection Piezoelectric Positioning and Actuation Programmable Power Supplies DESCRIPTION The CD64 is a dual high voltage, high current booster amplifier designed to provide voltage and current gain for a small signal, general purpose op amp. Including the power booster within the feedback loop of the driver amplifier results in a composite amplifier with the accuracy of the driver and the extended output cur- rent capability of the booster. The output stage utilizes complementary MOSFETs, providing symmetrical output impedance and elimi- nating second breakdown limitations imposed by Bipolar Junction Transistors. Although the booster can be configured quite simply, enormous flexibility is provided through the choice of driver amplifier, current limit and supply voltage. The CD64s design is based on the PB64 and is a cost-effective alternative. The SMT construction allows for a low production cost that rivals the much more expensive hybrid option for a fraction of the price. It is built on a thermally conductive but electrically isolated substrate with a footprint of 5.69 in (36.7 cm) for both channels, which can be mounted to a heatsink. Apex Microtechnology Inc. Jun 2021 www.apexanalog.com All rights reserved CD64U Rev BCD64 TYPICAL CONNECTION Figure 1: Typical Connection (Composite Configuration) R R I F V IN +V S 100nF 47& +15V 100nF R CL +V B Op +V V S OUT IN Amp C L +V S CD64 C C GAIN R L -V S -V 100nF C B C -15V R GAIN 47& 100nF -V S Figure 2: Typical Connection (Standalone Configuration) +V S 100nF 47& R CL +V B +V V S OUT IN C L V CD64 IN C C GAIN R -V L S -V C B C R GAIN 47& 100nF -V S 2 CD64U REV B