HCTL-2017#PLC

HCTL-2001-A00, HCTL-2017-A00 / PLC, HCTL-2021-A00 / PLC Quadrature Decoder/Counter Interface ICs Data Sheet Description Features The HCTL-2xx1(7)-A00/PLC is CMOS ICs that performs Interfaces Encoder to Microprocessor the quadrature decoder, counter, and bus interface 14 MHz Clock Operation function. The HCTL-2xx1(7)-A00/PLC is designed to improve system performance in digital closed loop High Noise Immunity: motion control systems and digital data input systems. Schmitt Trigger Inputs and Digital Noise Filter It does this by shifting time intensive quadrature 16-Bit Binary Up/Down Counter decoder functions to a cost effective hardware solution. The HCTL-2xx1(7)-A00/PLC consists of a quadrature Latched Outputs decoder logic, a binary up/down state counter, and an 8-Bit Tristate Interface 8-bit bus interface. The use of Schmitt-triggered CMOS inputs and input noise filters allows reliable operation 8, 12 or 16-Bit Operating Modes in noisy environments. The HCTL-2001-A00 contains Quadrature Decoder Output Signals, Up/Down and 12-bit counter and HCTL-2017-A00/PLC or HCTL-2021- Count A00/PLC contains 16-bit counter and provides TLL/ CMOS compatible tri-state output buffers. Operation Cascade Output Signals, Up/Down and Count is specified for a temperature range from 40 to +85C Substantially Reduced System Software at clock frequencies up to 14MHz. 5V Operation (V V ) DD SS The HCTL-2021-A00/PLC provides quadrature decoder output signals and cascade signals for use with many TTL/CMOS Compatible I/O standard computer ICs. Operating Temperature: -40C to 85C 16-Pin PDIP, 20-Pin PDIP, 20-Pin PLCC Applications Interface Quadrature Incremental Encoders to Microprocessors Interface Digital Potentiometers to Digital Data Input Buses Part Number Description Pinout Package HCTL-2001-A00 14 MHz clock operation. 12-bit counter. PINOUT A PACKAGE A HCTL-2017-A00 14 MHz clock operation. 16-bit counter. PINOUT A PACKAGE A HCTL-2017-PLC 14 MHz clock operation. 16-bit counter. PINOUT C PACKAGE C HCTL-2021-A00 14 MHz clock operation. 16-bit counter. PINOUT B PACKAGE B Quadrature decoder output signals. Cascade output signals. HCTL-2021-PLC 14 MHz clock operation. 16-bit counter. PINOUT D PACKAGE C Quadrature decoder output signals. Cascade output signals.Devices PINOUT A PINOUT B 1 D0 VDD 20 1 D0 VDD 16 2 CLK D1 19 2 CLK D1 15 3 SEL D2 18 3 SEL D2 14 4 OE D3 17 4 OE D3 13 5 U/D CNTdec 16 5 RST D4 12 6 NC CNTcas 15 7 RST D4 14 CH B 6 D5 11 8 CH B D5 13 7 CH A D6 10 9 CH A D6 12 89VSS D7 10 VSS D7 11 PINOUT C PINOUT D Package Dimensions (dimension in mm) See Appendix A. 2