Product Information

MGA-13316-TR1G

MGA-13316-TR1G electronic component of Broadcom

Datasheet
Avago Technologies RF Amplifier 2.2-4 GHz2S LNA

Manufacturer: Broadcom
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 2000
Multiples : 2000

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MGA-13316-TR1G
Broadcom

2000 : USD 3.6237
4000 : USD 3.489
6000 : USD 3.3543
20000 : USD 3.2196
N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1

Stock Image

MGA-13316-TR1G
Broadcom

1 : USD 5.0765
100 : USD 3.7394
1000 : USD 3.0146
10000 : USD 2.7827
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
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MGA-13316 High Gain, High Linearity Low Noise Amplifier Data Sheet Description Features Avago Technologies MGA-13316 is a two stage, easy-to- Low noise figure use GaAs MMIC Low Noise Amplifier (LNA). The LNA has High gain low noise with good input return loss and high linearity High linearity performance achieved through the use of Avago Technologies propri- Excellent isolation etary 0.25 m GaAs Enhancement-mode pHEMT process. 1 Minimum matching needed for input, output and the GaAs E-pHEMT Technology inter-stage between the two LNA. 3 Low cost small package size: 4.0 x 4.0 x 0.85 mm It is designed for optimum use between 2.2 GHz to 4 GHz. Excellent uniformity in product specifications For optimum performance at lower frequency from Meets MSL1, Lead-free and halogen free 400 MHz to 1.5 GHz, MGA-13116 is recommended. For Specifications optimum performance at frequency from 1.5 GHz to 2.5 GHz, the MGA-13216 is recommended. All these 3 2.5 GHz Q1: 5 V, 53 mA (typ) Q2: 5 V, 116 mA (typ) products, MGA-13116, MGA-13216 and MGA-13316 share 0.76 dB Noise Figure the same package and pinout configuration. 34.3 dB Gain Pin Configuration and Package Marking 50.3 dB RFout Q1 to RFin Q2 Isolation 3 4.0 x 4.0 x 0.85 mm 16-lead QFN 41.8 dBm Output IP3 23.5 dBm Output Power at 1dB gain compression Pin 2 Vbias Applications Pin 3 RFin Q1 12 1 AVAGO Pin 10 RFout Q2 11 2 13316 Pin 11 RFout Q2 Low noise amplifier for cellular infrastructure including GND Pin 13 RFin Q2 10 3 YYWW GSM, CDMA, TD-LTE, and W-CDMA. Pin 16 RFout Q1 XXXX 9 4 Other very low noise applications. All other pins NC Not Connected Simplified Schematic Vdd2 Vdd1 Top View Bottom View C10 C5a C9b R4b Note: R2 C7 Package marking provides orientation and identification C4 R3 13316 = Product Code L3 YYWW = Year and Work Week of Manufacture C8 XXXX = Lot Number C6 R1 C3 16 15 14 13 L1 1 12 L2 2 11 Attention: Observe precautions for Q1 bias C1 RFIN C2 RFOUT handling electrostatic sensitive devices. Q1 3 Q2 10 ESD Machine Model = 90 V 4 9 L4 5 6 7 8 ESD Human Body Model = 600 V Refer to Avago Application Note A004R: Notes: Enhancement mode technology employs positive gate bias, Electrostatic Discharge, Damage and Control. thereby eliminating the need of negative gate voltage associated with conventional depletion mode devices. 8 13 7 14 6 15 5 16 1 MGA-13316 Absolute Maximum Rating T = 25 C Thermal Resistance A 3 Thermal Resistance Symbol Parameter Units Absolute Maximum (V = 5.0 V, I = 53 mA, V = 5.0 V, dd1 dd1 dd2 Vdd1 Device Voltage V 5.5 I = 116 mA), = 39.59 C/W dd2 jc Vdd2 Device Voltage V 5.5 Notes: 1. Operation of this device in excess of any of Idd1 Q1 Drain Current mA 90 these limits may cause permanent damage. 2 P Power Dissipation W 1.19 d 2. This is limited by maximum Vd and Id. Board temperature (T) is 25 C. For T >103 C, P CW RF Input Power dBm 20 c c in,max derate the device power at 25 mW per C rise T Junction Temperature C 150 j,max in board temperature adjacent to package bottom. T Storage Temperature C -65 to 150 stg 3. Thermal resistance measured using Infra- Red Microscopy Technique. 1 Electrical Specifications RF performance at Vdd1 = 5 V, Vdd2 = 5 V, 2.5 GHz, T = 25 C, measured on the demo board. A Symbol Parameter and Test Condition Units Min. Typ. Max. Idd1 Current at Q1 mA 40 53 68 Idd2 Current at Q2 mA 96 116 138 NF Noise Figure dB 0.76 1.1 GainGain dB3334.336.3 2 OIP3 Output Third Order Intercept Point dBm 37 41.8 OP1dB Output Power at 1 dB Gain Compression dBm 22.1 23.5 IRL Input Return Loss, 50 source dB -19.5 ORL dB -10.5 Output Return Loss, 50 load S12 Reverse Isolation dB 50 ISOL Isolation between Output pin to Input pin dB 50.3 1-2 Notes: 1. Measurements obtained using demo board described in Figure 7 with component list in Table 1. Input and Output trace loss is not de-embedded from the measurement. 2. OIP3 test condition: f = 2500 MHz, f = 2501 MHz with input power of -27 dBm per tone. tone1 tone2 3. Use proper bias, heatsink and derating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application note for more details. 2

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
 AVAGO TECHNOLOGIES
AV4
AV9
Avago
AVAGO TECHNOLOGIES
Avago Technologies US Inc.
AVAGO(Broadcom)
Broadcom Avago
BROADCOM (AVAGO)
Broadcom / Avago
BROADCOM CORPORATION
Broadcom Limited
PLX Technology Avago
PLX Technology / Avago

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