AT25FF321A-SSHN-T Dialog Semiconductor

PRELIMINARY DATASHEET AT25FF321A 32 Mbit, 1.65V - 3.6V Range SPI Serial Flash Memory with Multi-I/O Support Features Voltage Range: 1.65 V - 3.6 V 32 Mbit (2M x 16) Flash Memory Serial Peripheral Interface (SPI) compatible - Supports SPI modes 0 and 3 (1-1-1) - Supports dual output operation (1-1-2) - Supports quad output operation (1-1-4) - Supports quad I/O operation (1-4-4) - Supports XiP operation (1-4-4, 0-4-4) 133 MHz maximum operating frequency - Clock-to-output of 8 ns Flexible, optimized erase architecture for code + data storage applications - Uniform 4-kB block erase - Uniform 32-kB block erase - Uniform 64-kB block erase - Full chip erase Flexible non-volatile block protection 1 x 128-byte factory-programmed unique identifier 3 x 128-byte, One Time Programmable (OTP) security registers Flexible programming - Byte/Page program (1 to 256 bytes) - Sequential program mode capability Erase program suspend resume Software controlled Reset and Terminate commands Hardware reset option (via HOLD pin) JEDEC hardware reset Non-volatile status register configuration option JEDEC standard manufacturer and device ID read methodology Serial Flash Discoverable Parameters (SFDP) version 1.6 Low power dissipation: - 25.6 A standby current (typical) - 6.3 A Deep Power-Down (DPD) current (typical) - 5-7 nA Ultra Deep Power Down (UDPD) current (typical) - 8.3 mA active read current (1-1-1 104 MHz) - 9.2 mA program current - 10.2 mA erase current User configurable and auto I/O pin drive levels Endurance - 100,000 program/erase cycles Data Retention - 20 years Temperature Range o o - -40 C to +85 C Industry standard green (Pb/Halide-free/RoHS Compliant) Package Options - 8-lead SOIC (150-mil) - 8-lead SOIC (208-mil) - 8-pad Ultra-thin DFN (5 x 6 x 0.6 mm) Contact Adesto - 8-pad Ultra-thin Small Outline No-lead USON (3 x 4 x 0.55 mm) - 12-ball WLCSP (3 x 2 x 3 ball matrix) - Die in Wafer Form (DWF) Contact Adesto DS-AT25FF321A181F10-20201. Product Overview The Adesto AT25FF321A is a serial interface Flash memory device designed for use in a wide variety of high- volume consumer and connected applications. It is optimized for low-energy applications and can be operated using modern Lithium battery technologies over a wide input voltage range of 1.65V - 3.6V. The AT25FF321A is ideally suited for systems in which program code is shadowed from Flash memory into embedded or external RAM (code shadow) for execution, and where small amounts of data are stored and updated locally in the Flash memory. The erase block sizes of the AT25FF321A have been optimized to meet the needs of today s code and data storage applications. The device supports 4 kB, 32 kB, and 64 kB block erase operations and a full-chip erase. By optimizing the size of the erase blocks, the memory space can be used much more efficiently. The device contains four specialized 128-byte One-Time Programmable (OTP) security registers that can be used to store a unique device ID and locked key storage. Specifically designed for use in a wide variety of systems, the AT25FF321A supports read, program, and erase operations. No separate voltage is required for programming and erasing. Throughout this document, the term Multi-I/O is used generically to refer to all of the multiple I/O modes, including dual, quad, and XiP. 2. Package Pinouts Figure 2-1 shows the package pinouts for the following packages. Note that the Die in Wafer Form (DWF) option is not shown. Figure 2-1. Adesto Memory Package Types Top View 1 8 VCC CS HOLD/RESET (I/O ) SO (I/O ) 2 7 3 1 8S1 8-lead SOIC Package (0.150) 8S2 8-lead EIAJ SOIC Package (0.208) 3 6 WP (I/O ) SCK 2 GND 4 5 SI (I/O ) 0 Top View 1 8 CS VCC SO (I/O ) 1 2 7 HOLD/RESET (I/O ) 3 8MA1 8-pad 5 x 6 x 0.6 mm UDFN Package 8MA2 8-pad 3 x 4 x 0.55 mm USON Package WP (I/O ) 3 6 2 SCK GND 4 5 SI (I/O ) 0 Bottom View 1& 1& &6 9&& % % *1 12-ball WLCSP Package & 62 +2/ 6, ( 6&. :3 * * ) ) 1& 1& AT25FF321A 2 DS-AT25FF321A181F10-2020