RM24C128C-LMAI-T

RM24C128C-L 128-Kbit 1.65V Minimum Non-volatile Serial EEPROM Memory 2 I C Bus Preliminary Datasheet Features Memory array: 128Kbit non-volatile serial EEPROM memory Single supply voltage: 1.65V - 3.6V 2 2-wire I C interface 2 Compatible with I C bus modes: -100kHz -400kHz -1MHz Page size: 64 bytes -Byte and Page Write from 1 to 64 bytes Low Energy Byte Write -Byte Write consuming 50 nJ Low power consumption -0.25 mA active Read current -1.0 mA active Write current -1.0 A Standby current Fast Write -Page Write in 1.5 ms (64 byte page) -Byte Write within 30 s Random and sequential Read modes Unlimited read cycles Write protect of the whole memory array 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN and 6-ball WLCSP packages RoHS-compliant and halogen-free packaging Data Retention: 10 years Industrial Operating Temperature: -40C to 85C Endurance: 10,000 Write Cycles Based on Adesto s proprietary CBRAM technology Description The Mavriq RM24C128C-L is a 128Kbit, serial EEPROM memory device that utilizes Adesto s CBRAM resistive technology. The memory devices use a single low- voltage supply ranging from 1.65V to 3.6V. 2 2 The Mavriq I C device is accessed through a 2-wire I C compatible interface consisting of a Serial Data (SDA) and Serial Clock (SCL). The maximum clock (SCL) frequency is 1MHz. The devices have both byte write and page write capability. Page write is 64 bytes. The Byte Write operation of Mavriq memory consumes only 10% of the energy consumed by a Byte Write operation of EEPROM devices of similar size. DS-RM24C128C-L080E11/2016The Page Write operation of Mavriq memory is 4-6 times faster than the Page Write operation of similar EEPROM devices. Both random and sequential reads are available. Sequential reads are capable of reading the entire memory in one operation. External address pins permit up to eight devices on the same data bus. The devices are available in standard 8-pin SOIC and TSSOP, UDFN and WLCSP packages. 1. Block Diagram Figure 1-1. Block Diagram I/O Buffers and Data VCC Latches I/O SCL Control Page Buffer SDA Logic E0 Y-Decoder Memory E1 Control Logic E2 WP Address Latch 32 Kb to 512 Kb & Resistive Memory Counter GND RM24C128C-L 2 DS-RM24C128C-L080E11/2016 X-Decoder