SLG55021
SLG55021-200010V
TM
GreenFET High Voltage Gate Driver
Features Pin Configuration
5V 5% Power supply
VCC 1 8
PG
SLG55021 Drain Voltage Range 1.0V to 20V
7
ON 2 G
Internal Gate Voltage Charge Pump
3 6 S
SHDN#
Controlled Turn on Delay
D
GND 45
Controlled Load Discharge Rate
Controlled Turn on Slew Rate TDFN-8
(Top View)
Stable Slew Rate (2% typ) over Temperature Range
TDFN-8 Package
Applications
Power Rail Switches
Hot Plugging Applications
Soft Switching
Personal computers and Servers
Data Communications Equipment
Block Diagram
CC
D
1
D
Q-PUMP 5
2
ON
G
+
7
SHDN#
_
3
PG
8
Timing & Logic
S
6
Discharge
LOAD
4
G
SLG55021
For N-MOSFETS with V < 20V
GS
Silego Technology, Inc. Rev 1.02
000-0055021-102 Revised September 21, 2016SLG55021-200010V
Pin Description
Pin Name Pin Number Type Pin Description
VCC 1 Power Supply Voltage
ON 2 Input CMOS Logic Level. High True
SHDN# 3 Input Shut Down# - Low True Signal which immediately turns FET off
GND 4 GND Ground
D 5 Input FET Drain Connection
S 6 Input Source Connection
G 7 Output FET Gate Drive
Output CMOS Open Drain - Power Good, indicates external FET
PG 8 Output
fully on
Overview
The SLG55021 N-Channel FET Gate Driver is used for controlling a delayed turn on and ramping slew rate of the source voltage
on N-Channel FET switches from a CMOS logic level input. Intended as a supporting control element for switched voltage rails
in energy efficient, advanced power management systems, the SLG55021 also integrates circuits to discharge opened switched
voltage rails. The gate driver is available in a variety of configurations supporting a range of turn-on slew rates from 0.80V/ms
up to 4V/ms which, depending on load supplying source voltages in the range of 1.0V to 20V results in ramp times from 200 s
up to over 20ms (see Application Section). Delays until the ramp begins are source voltage independent and range from 250s
to 5ms. A power good condition is output to indicate that the ramp-up slew of the source voltage is finished. Additionally, an
internal discharge circuit provides a controlled path to remove charge from open power rails. The SLG55021 gate drive is
packaged in an 8 pin DFN package.
When used with external N-Channel FETs, the SLG55021 supports low transient, energy efficient switching of high current loads
at source voltages ranging from 1.0V to 20V.
Ordering Information
Ramp Slew Discharge
Rate Delay Time Resistor
Part Number (Volts/ms) (ms) (ohms) Package Type
SLG55021-200010V 2.0 0.15 200 TDFN-8
SLG55021-200010VTR 2.0 0.15 200 TDFN-8 - Tape and Reel (3k units)
000-0055021-102 Page 2 of 8