AP7165 600mA LOW DROPOUT REGULATOR WITH POK Description Pin Assignments The AP7165 is a 600mA, adjustable output voltage, ultra-low (Top View) dropout linear regulator. The device includes pass element, error amplifier, band-gap reference, current limit and thermal OUT IN 1 10 shutdown circuitry. The device is turned on when EN pin is set to logic high level. A Power-OK (POK) output is available IN 2 9 OUT for power sequence control. POK 3 8 FB The characteristics of the low dropout voltage and low NC 4 7 NC quiescent current make it suitable for low to medium power applications, for example, laptop computers, audio and video EN 5 6 GND applications, and battery powered devices. The typical quiescent current is approximately 125A. U-DFN3030-10 Built-in current-limit and thermal-shutdown functions prevent (Top View) IC from damage in fault conditions. The AP7165 are available in U-DFN3030-10 and SO-8EP packages. 1 8 OUT IN Features 2 7 IN OUT Wide input voltage range: 2.2V 5.5V 300mV very low dropout at 500mA load 3 6 FB POK Very low quiescent current (I ): 125A typical Q 2.5% total accuracy over line, load and temperature 4 5 GND EN Adjustable output voltage range: 0.8V to 5.0V Very fast transient response SO-8EP High PSRR Accurate voltage regulation Applications Current limiting and short circuit protection Servers and laptops Thermal shutdown protection Smart phone and PDA Stable with any type output capacitor 4.7F MP3/MP4 Ambient temperature range -40C to +85C Bluetooth headset U-DFN3030-10 and SO-8EP: Available in Green Low and medium power applications Molding Compound (No Br, Sb) FPGA and DSP core or I/O power Lead Free Finish/RoHS Compliant (Note 1) Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at AP7165 600mA LOW DROPOUT REGULATOR WITH POK Typical Application Circuit V V IN OUT IN OUT AP7165 R 1 1F 10F FB POK R 2 Enable EN GND R 1 V = V 1+ OUT REF R 2 Pin Descriptions Pin Name Description U-DFN3030-10 SO-8EP Voltage input pins, to be tied together externally. Bypass to ground IN 1, 2 1, 2 through at least 1F capacitor. POK 3 3 Power-OK output, active-high open-drain. EN 5 4 Enable input, active high. GND 6 5 Ground. FB 8 6 Output feedback. Voltage output pins, to be tied together externally. Bypass to ground OUT 9, 10 7, 8 through at least 4.7F ceramic capacitor. NC 4, 7 NA No connection. 2 of 15 March 2012 AP7165 Diodes Incorporated www.diodes.com Document number: DS31270 Rev. 7 - 2