AP7167 1.2A LOW DROPOUT REGULATOR WITH POK Description Pin Assignments The AP7167 is a 1.2A, adjustable output voltage, ultra-low ( Top View ) dropout linear regulator. The device includes pass element, error amplifier, band-gap reference, current limit and thermal shutdown circuitry. The device is turned on when EN pin is 1 10 OUT IN set to logic high level. A Power-OK (POK) output is available 2 9 OUT for power sequence control. IN 8 3 FB POK The characteristics of the low dropout voltage and low 7 4 NC NC quiescent current make it suitable for low to medium power applications, for example, laptop computers, audio and video 5 6 EN GND applications, and battery powered devices. The typical quiescent current is approximately 125A. DFN3030-10 Built-in current-limit and thermal-shutdown functions prevent IC from damage in fault conditions. ( Top View ) The AP7167 are available in DFN3030-10 and SOP-8L packages. IN 1 8 OUT 2 7 OUT Features IN POK 3 6 FB Wide input voltage range: 2.2V 5.5V 230mV very low dropout at 500mA load EN 4 5 GND 500mV very low dropout at 1A load 3% total accuracy over line, load and temperature Very low quiescent current (IQ): 125A typical SOP-8L-EP Adjustable output voltage range: 0.8V to 5.0V Very fast transient response High PSRR Accurate voltage regulation Applications Current limiting and short circuit protection Thermal shutdown protection Servers and laptops Stable with any type output capacitor 4.7F Smart phone and PDA Ambient temperature range -40C to 85 C MP3/MP4 DFN3030-10 and SOP-8L-EP: Available in Green Bluetooth headset Molding Compound (No Br, Sb) Low and medium power applications Lead Free Finish/ RoHS Compliant (Note 1) FPGA and DSP core or I/O power Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at AP7167 1.2A LOW DROPOUT REGULATOR WITH POK Typical Application Circuit V IN V OUT IN OUT 100kOhm R AP7167 1 1F 10F FB POK R 2 Enable EN GND R 1 V = V 1 + OUT REF R 2 Pin Descriptions Pin Pin Name Description DFN3030-10 SOP-8L-EP Voltage input pins, to be tied together externally. Bypass to ground IN 1, 2 1, 2 through at least 1F capacitor. POK 3 3 Power-OK output, active-high open-drain. EN 5 4 Enable input, active high. GND 6 5 Ground. FB 8 6 Output feedback. Voltage output pins, to be tied together externally. Bypass to ground OUT 9, 10 7, 8 through at least 4.7F ceramic capacitor. NC 4, 7 NA No connection. 2 of 14 September 2010 AP7167 Diodes Incorporated www.diodes.com Document number: DS31252 Rev. 7 - 2