PI4IOE5V9557 2 8-bit I C-bus and SMBus I/O port with reset Features Description Operation power supply voltage from 2.3V to 5.5V The PI4IOE5V9557 provide 8 bits of General Purpose 2 2 8-bit I C-bus GPIO with interrupt and reset parallel Input/Output (GPIO) expansion for I C- 5V tolerant I/Os bus/SMBus applications. It includes the features such as higher driving capability, 5V tolerance, lower power Polarity inversion register supply, individual I/O configuration, and smaller Active LOW Reset Pin packaging. It provides a simple solution when additional Low current consumption I/O is needed for ACPI power switches, sensors, push 0Hz to 400KHz clock frequency buttons, LEDs, fans, etc. The PI4IOE5V9557 consists of an 8-bit register to Noise filter on SCL/SDA inputs configure the I/Os as either inputs or outputs, and an 8- Power-on reset bit polarity register to change the polarity of the input ESD protection (4KV HBM and 1KV CDM) port register. The data for each input or output is kept in Offered in three different packages:SOIC-16, the corresponding Input port or Output port register. All TSSOP-16 and TQFN 4x4-16 registers can be read by the system master. The power-on reset sets the registers to their default values and initializes the device state machine. The RESET pin causes the same reset/default I/O input configuration to occur without de-powering the device, 2 holding the registers and I C-bus state machine in their default state until the RESET input is once again HIGH. Three hardware pins (A0, A1, A2) vary the fixed 2 I C-bus address and allow up to eight devices to share 2 the same I C-bus/SMBus. Pin Configuration Figure 2: TQFN 4x4-16 ( Top view ) Figure 1: SOIC-16/TSSOP-16 ( Top View ) 2015-07-0028 PT0552-2 8/18/15 1 PI4IOE5V9557 2 8-bit I C-bus and SMBus I/O port with reset Pin Description Table 1: Pin Description Pin Name Type Description SO16 TSSOP16 TQFN16 1 15 SCL I Serial clock line 2 16 SCA I Serial data line 3 1 A0 I Address input 0 4 2 A1 I Address input 1 5 3 A2 I Address input 2 6 4 IO0 I/O input/output 0 (open-drain) 7 5 IO1 I/O input/output 1 8 6 GND G Supply ground 9 7 IO2 I/O input/output 2 10 8 IO3 I/O input/output 3 11 9 IO4 I/O input/output 4 12 10 IO5 G input/output 5 13 11 IO6 I/O input/output 6 14 12 IO7 I/O input/output 7 15 13 I Active LOW reset input RESET 16 14 VCC P Supply voltage * I = Input O = Output P = Power G = Ground 2015-07-0028 PT0552-2 8/18/15 2