PI6C49X0204B-A Low Skew, 1-TO-4 LVCMOS/LVTTL Fanout Buffer Features Description Four LVCMOS / LVTTL outputs LVCMOS / LVTTL clock input The PI6C49X0204B-A is a low skew, 1-to-4 Fanout Buffer. CLK can accept the following input levels: LVCMOS, LVTTL Guaranteed output and part-to-part skew characteristics make the PI6C49X0204B-A ideal for those clock distribution applications Maximum output frequency: 200MHz demanding well defined performance and repeatability. Additive phase jitter, RMS: 0.06ps (typical) 3.3V Output skew: 45ps (maximum) 3.3V Part-to-part skew: 500ps (maximum) Small 8 lead SOIC package saves board space 3.3V core supply, 3.3V or 2.5V output supply 0C to 70C ambient operating temperature Block Diagram Pin Assignment Q0 VDDO Q3 1 8 Q1 Q2 VDD 2 7 Pulldown CLK Q1 CLK 3 6 Q2 GND 4 5 Q0 Q3 www.pericom.com PI6C49X0204B-A Rev A 12/05/13 13-0148 1PI6C49X0204B-A Low Skew, 1-TO-4 LVCMOS/LVTTL Fanout Buffer Pin Descriptions Pin Pin Name Pin Type Pin Description 1 V Power Output supply pin. DDO 2 V Power Positive supply pin. DD 3 CLK Input Pulldown LVCMOS / LVTTL clock input. 4 GND Power Power supply ground. 5 Q0 Output Single clock output. LVCMOS / LVTTL interface levels. 6 Q1 Output Single clock output. LVCMOS / LVTTL interface levels. 7 Q2 Output Single clock output. LVCMOS / LVTTL interface levels. 8 Q3 Output Single clock output. LVCMOS / LVTTL interface levels. Note: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. Pin Characteristics Symbol Parameter Test Conditions Min. Typical Max. Units C Input Capacitance 4 pF IN Power Dissipation Capacitance C V , V = 3.465V 15 pF PD DD DDO (per output) R Input Pulldown Resistor 51 k PULLDOWN R Output Impedance V , V >2.5V 5 7 12 OUT DD DDO www.pericom.com PI6C49X0204B-A Rev A 12/05/13 13-0148 2