5962-9055502LA E2v

5962-9055502LA electronic component of E2v Images are for reference only, See Product Specifications

X-On Electronics has gained recognition as a prominent supplier of 5962-9055502LA EEPLD - Electronically Erasable Programmable Logic Devices across the USA, India, Europe, Australia, and various other global locations. 5962-9055502LA EEPLD - Electronically Erasable Programmable Logic Devices are a product manufactured by E2v. We provide cost-effective solutions for EEPLD - Electronically Erasable Programmable Logic Devices, ensuring timely deliveries around the world.

Part No. 5962-9055502LA
Manufacturer: E2v
Category: EEPLD - Electronically Erasable Programmable Logic Devices
Description: SPLD PLDC20RA10 Family 10 Macro Cells 41.67MHz 0.8um Technology 5V 24-Pin CDIP T/R
Datasheet: 5962-9055502LA Datasheet (PDF)
Price (USD)
1: USD 424.8398 ea
Line Total: USD 424.84 
Availability : 0
  
QtyUnit Price
1$ 424.8398

Availability 0
Ship by Thu. 25 Sep to Wed. 01 Oct
MOQ : 1
Multiples : 1
QtyUnit Price
1$ 424.8398

   
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RoHS - XON
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We are delighted to provide the 5962-9055502LA from our EEPLD - Electronically Erasable Programmable Logic Devices category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the 5962-9055502LA and other electronic components in the EEPLD - Electronically Erasable Programmable Logic Devices category and beyond.

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REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes 02-02-21 Raymond Monnin throughout. - gap B Add QP Semiconductor as an approved source of supply and editorial 06-06-22 Raymond Monnin changes throughout. - tcr THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE SUPPLY CENTER COLUMBUS CHECKED BY COLUMBUS, OHIO 43218-3990 STANDARD Kenneth S. Rice 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-90555 01 K X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function t PD 01 C20RA10 Asynchronous PLD 35 ns 02 C20RA10 Asynchronous PLD 25 ns 03 C20RA10 Asynchronous PLD 20 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3, X CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage to ground potential ................................................ -0.5 V dc to +7.0 V dc DC voltage applied to outputs in high Z state ............................... -0.5 V dc to +7.0 V dc DC input voltage ........................................................................... -3.0 V dc to +7.0 V dc Maximum power dissipation (P ) 2/ ............................................. 1.0 W D Lead temperature (soldering, 10 seconds) ................................... +260C Thermal resistance, junction-to-case ( ): ................................... See MIL-STD-1835 JC Junction temperature (T ) ............................................................. +175C J Storage temperature range ........................................................... -65C to +150C Temperature under bias ................................................................ -55C to +125C Output current into outputs (low) ................................................... -16 mA _______ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added P due to short circuit test; e.g., I . D OS SIZE STANDARD 5962-90555 A MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS REVISION LEVEL SHEET COLUMBUS, OHIO 43218-3990 B 2 DSCC FORM 2234 APR 97

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
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