RFM12B Universal ISM RFM12B Band FSK Transceiver DESCRIPTION Hoperf RFM12B is a single chip, low power, multi-channel FSK transceiver designed for use in applications requiring FCC or ETSI conformance for unlicensed use in the 433, 868 and 915 MHz bands. TM The RFM12B transceiver is a part of Hoperf EZRadio product line, which produces a flexible, low cost, and highly integrated solution that does not require production alignments. The chip is a complete analog RF and baseband transceiver including a multi-band PLL synthesizer with PA, LNA, I/Q down converter mixers, baseband filters and amplifiers, and an I/Q demodulator. All required RF functions are integrated. Only an external crystal and bypass filtering are needed for operation. The RFM12B features a completely integrated PLL for easy RF design, and its rapid settling time allows for fast frequency-hopping, FEATURES bypassing multipath fading and interference to achieve robust wireless Fully integrated (low BOM, easy design-in) links. The PLLs high resolution allows the usage of multiple channels No alignment required in production in any of the bands. The receiver baseband bandwidth (BW) is Fast-settling, programmable, high-resolution PLL synthesizer programmable to accommodate various deviation, data rate and Fast frequency-hopping capability crystal tolerance requirements. The transceiver employs the Zero-IF High bit rate (up to 115.2 kbps in digital mode and 256 kbps approach with I/Q demodulation. Consequently, no external in analog mode) components (except crystal and decoupling) are needed in most Direct differential antenna input/output applications. Integrated power amplifier Programmable TX frequency deviation (15 to 240 kHz) The RFM12B dramatically reduces the load on the microcontroller with Programmable RX baseband bandwidth (67 to 400 kHz) the integrated digital data processing features: data filtering, clock Analog and digital RSSI outputs recovery, data pattern recognition, integrated FIFO and TX data Automatic frequency control (AFC) register. The automatic frequency control (AFC) feature allows the use Data quality detection (DQD) of a low accuracy (low cost) crystal. To minimize the system cost, the Internal data filtering and clock recovery RFM12B can provide a clock signal for the microcontroller, avoiding RX synchron pattern recognition the need for two crystals. SPI compatible serial control interface Clock and reset signals for microcontroller For low power applications, the RFM12B supports low duty cycle 16-bit RX Data FIFO operation based on the internal wake-up timer. Two 8-bit TX data registers Low power duty cycle mode FUNCTIONAL BLOCK DIAGRAM Standard 10 MHz crystal reference with on-chip tuning Wake-up timer MIX 2.2 to 3.8 V supply voltage I AMP OC DCLK / Low power consumption 7 RF1 13 I/Q Data Filt CFIL / FFIT / Self cal. FSK / LNA data DEMOD CLK Rec 6 Low standby current (0.3 A) DATA / RF2 12 MIX nFFS Q AMP OC Compact 16 pin TSSOP package PA FIFO Supports very short packets (down to 3 bytes) Excellent temperature stability of the RF parameters PLL & I/Q VCO RSSI COMP DQD AFC with cal. Good adjacent channel rejection/blocking RF Parts BB Amp/Filt./Limiter Data processing units TYPICAL APPLICATIONS WTM CLK div Xosc LBD Controller Bias with cal. Home security and alarm Low Power parts Remote control, keyless entry 8 9 15 1 2 3 4 5 10 16 11 14 Wireless keyboard/mouse and other PC peripherals CLK XTL / ARSSI SDI SCK nSEL SDO nIRQ nRES nINT / VSS VDD REF VDI Toy controls Remote keyless entry Tire pressure monitoring Telemetry Personal/patient data logging Remote automatic meter reading 1 RFM12B Full Baseband Amplifier Transfer Function DETAILED FEATURE-LEVEL DESCRIPTION BW=67kHz The RFM12B FSK transceiver is designed to cover the unlicensed frequency bands at 433, 868 and 915 MHz. The device facilitates compliance with FCC and ETSI requirements. The receiver block employs the Zero-IF approach with I/Q demodulation, allowing the use of a minimal number of external components in a typical application. The RFM12B incorporates a fully integrated multi-band PLL synthesizer, PA with antenna tuning, an LNA with switchable gain, I/Q down converter mixers, baseband filters and amplifiers, and an I/Q demodulator followed by a data filter. PLL The programmable PLL synthesizer determines the operating frequency, while preserving accuracy based on the on-chip crystal- controlled reference oscillator. The PLLs high resolution allows the multiple channels in any of the bands. usage of Data Filtering and Clock Recovery Output data filtering can be completed by an external capacitor RF Power Amplifier (PA) or by using digital filtering according to the final application. The power amplifier has an open-collector differential output and Analog operation: The filter is an RC type low-pass filter followed can directly drive different PCB antennas with a programmable by a Schmitt-trigger (St). The resistor (10 kOhm) and the St are output power level. An automatic antenna tuning circuit is built in integrated on the chip. An (external) capacitor can be chosen to avoid costly trimming procedures and the so-called hand according to the actual bit rate. In this mode, the receiver can effect. handle up to 256 kbps data rate. The FIFO cannot be used in this mode and clock is not provided for the demodulated data. LNA Digital operation: A digital filter is used with a clock frequency at The LNA has approximately 250 Ohm input impedance, which 29 times the bit rate. In this mode, there is a clock recovery functions well with the proposed antennas circuit (CR), which can provide synchronized clock to the data. Using this clock the received data can fill a FIFO. The CR has If the RF input of the chip is connected to 50 Ohm devices, an three operation modes: fast, slow, and automatic. In slow mode, external matching circuit is required to provide the correct its noise immunity is very high, but it has slower settling time and matching and to minimize the noise figure of the receiver. requires more accurate data timing than in fast mode. In The LNA gain can be selected in four steps (between 0 and automatic mode, the CR automatically changes between fast and -20dB relative to the highest gain) according to RF signal slow mode. The CR starts in fast mode, then after locking, it strength. It can be useful in an environment with strong automatically switches to slow mode interferers. (Only the digital data filter and the clock recovery use the bit rate clock. For analog operation, there is no need for setting the Baseband Filters correct bit rate.) The receiver bandwidth is selectable by programming the bandwidth (BW) of the baseband filters. This allows setting up the receiver according to the characteristics of the signal to be received. An appropriate bandwidth can be chosen to accommodate various FSK deviation, data rate and crystal tolerance th requirements. The filter structure is 7 order Butterworth low- pass with 40 dB suppression at 2 BW frequency. Offset cancellation is done by using a high-pass filter with a cut-off frequency below 7 kHz. 2