CY62167EV30 MoBL 16-Mbit (1 M 16 / 2 M 8) Static RAM 16-Mbit (1 M 16 / 2 M 8) Static RAM low active current. Ultra low active current is ideal for providing Features More Battery Life (MoBL ) in portable applications such as cellular telephones. The device also has an automatic power TSOP I package configurable as 1 M 16 or 2 M 8 SRAM down feature that reduces power consumption by 99 percent Very high speed: 45 ns when addresses are not toggling. Place the device into standby mode when deselected (CE HIGH or CE LOW or both BHE and Temperature ranges 1 2 BLE are HIGH). The input and output pins (I/O through I/O ) 0 15 Industrial: 40 C to +85 C are placed in a high impedance state when: the device is Automotive-A: 40 C to +85 C deselected (CE HIGH or CE LOW), outputs are disabled (OE 1 2 Wide voltage range: 2.20 V to 3.60 V HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or a write operation is in progress (CE LOW, 1 Ultra-low standby power CE HIGH and WE LOW). 2 Typical standby current: 1.5 A To write to the device, take Chip Enables (CE LOW and CE 1 2 Maximum standby current: 12 A HIGH) and Write Enable (WE) input LOW. If Byte Low Enable Ultra-low active power (BLE) is LOW, then data from I/O pins (I/O through I/O ) is 0 7 written into the location specified on the address pins (A through Typical active current: 2.2 mA at f = 1 MHz 0 A ). If Byte High Enable (BHE) is LOW, then data from the I/O 19 Easy memory expansion with CE , CE , and OE Features 1 2 pins (I/O through I/O ) is written into the location specified on 8 15 the address pins (A through A ). 0 19 Automatic power-down when deselected To read from the device, take Chip Enables (CE LOW and CE 1 2 CMOS for optimum speed and power HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data Offered in Pb-free 48-ball VFBGA and 48-pin TSOP I packages from the memory location specified by the address pins appears on I/O to I/O . If Byte High Enable (BHE) is LOW, then data from Functional Description 0 7 memory appears on I/O to I/O . See Truth Table on page 12 8 15 The CY62167EV30 is a high performance CMOS static RAM for a complete description of read and write modes. organized as 1M words by 16 bits or 2M words by 8 bits. This For a complete list of related documentation, click here. device features an advanced circuit design that provides an ultra Logic Block Diagram DATA IN DRIVERS A 10 A 9 A 8 A 7 A 1M 16 / 2M x 8 6 A 5 RAM Array I/O I/O 0 7 A 4 A I/O I/O 8 15 3 A 2 A 1 A 0 COLUMN DECODER BYTE BHE CE 2 WE CE 2 CE 1 Power Down CE 1 OE Circuit BHE BLE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-05446 Rev. *N Revised November 19, 2014 ROW DECODER A 11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 A 19 SENSE AMPS CY62167EV30 MoBL Contents Pin Configuration .............................................................3 Ordering Information ...................................................... 13 Product Portfolio ..............................................................3 Ordering Code Definitions ......................................... 13 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 14 Operating Range ...............................................................4 Acronyms ........................................................................16 Electrical Characteristics .................................................4 Document Conventions ................................................. 16 Capacitance ......................................................................5 Units of Measure ....................................................... 16 Thermal Resistance ..........................................................5 Document History Page ................................................. 17 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 19 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 19 Data Retention Waveform ................................................6 Products ....................................................................19 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 19 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 19 Truth Table ......................................................................12 Technical Support ..................................................... 19 Document Number: 38-05446 Rev. *N Page 2 of 19