IS43TR16640BL-125JBL

IS43/46TR16640B, IS43/46TR16640BL IS43/46TR81280B, IS43/46TR81280BL 128MX8, 64MX16 1Gb DDR3 SDRAM FEBRUARY 2018 FEATURES Standard Voltage: VDD and VDDQ = 1.5V 0.075V Refresh Interval: 7.8 us (8192 cycles/64 ms) Tc= -40C to 85C Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V 3.9 us (8192 cycles/32 ms) Tc= 85C to 105C High speed data transfer rates with system Partial Array Self Refresh frequency up to 1066 MHz Asynchronous RESET pin 8 internal banks for concurrent operation TDQS (Termination Data Strobe) supported (x8 only) 8n-bit pre-fetch architecture OCD (Off-Chip Driver Impedance Adjustment) Programmable CAS Latency Programmable Additive Latency: 0, CL-1,CL-2 Dynamic ODT (On-Die Termination) Programmable CAS WRITE latency (CWL) based Driver strength : RZQ/7, RZQ/6 (RZQ = 240 ) on tCK Write Leveling Programmable Burst Length: 4 and 8 Up to 200 MHz in DLL off mode Programmable Burst Sequence: Sequential or Operating temperature: Interleave Commercial (TC = 0C to +95C) BL switch on the fly Industrial (T = -40C to +95C) C Auto Self Refresh(ASR) Automotive, A1 (TC = -40C to +95C) Self Refresh Temperature(SRT) Automotive, A2 (T = -40C to +105C) C OPTIONS ADDRESS TABLE Configuration: Parameter 128Mx8 64Mx16 128Mx8 Row Addressing A0-A13 A0-A12 64Mx16 Column Addressing A0-A9 A0-A9 Package: Bank Addressing BA0-2 BA0-2 96-ball BGA (9mm x 13mm) for x16 Page size 1KB 2KB 78-ball BGA (8mm x 10.5mm) for x8 Auto Precharge Addressing A10/AP A10/AP BL switch on the fly A12/BC A12/BC SPEED BIN Speed Option 15G 125K 125J 107M 093N Units JEDEC Speed Grade DDR3-1333G DDR3-1600K DDR3-1600J DDR3-1866M DDR3-2133N CL-nRCD-nRP 8-8-8 11-11-11 10-10-10 13-13-13 14-14-14 tCK tRCD,tRP(min) 12.0 13.75 12.5 13.91 13.09 ns Note: Faster speed options may be backward compatible to slower speed options. Refer to timing tables (8.3) Copyright 2018 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. I1 02/14/2018 IS43/46TR16640B, IS43/46TR16640BL IS43/46TR81280B, IS43/46TR81280BL 1. DDR3 PACKAGE BALLOUT 1.1 DDR3 SDRAM package ballout 78-ball BGA x8 1 2 3 4 5 6 7 8 9 A VSS VDD NC NU/TDQS VSS VDD B VSS VSSQ DQ0 DM/TDQS VSSQ VDDQ C VDDQ DQ2 DQS DQ1 DQ3 VSSQ D VSSQ DQ6 DQS VDD VSS VSSQ E VREFDQ VDDQ DQ4 DQ7 DQ5 VDDQ 1 F NC VSS RAS CK VSS NC G ODT VDD CAS CK VDD CKE H NC CS WE A10/AP ZQ NC J VSS BA0 BA2 NC(A15) VREFCA VSS K VDD A3 A0 A12/BC BA1 VDD L VSS A5 A2 A1 A4 VSS M VDD A7 A9 A11 A6 VDD N VSS RESET A13 NC(A14) A8 VSS Note: NC balls have no internal connection. NC(A14) and NC(A15) are one of NC pins and reserved for higher densities. 1.2 DDR3 SDRAM package ballout 96-ball BGA x16 1 2 3 4 5 6 7 8 9 A VDDQ DQU5 DQU7 DQU4 VDDQ VSS B VSSQ VDD VSS DQSU DQU6 VSSQ C VDDQ DQU3 DQU1 DQSU DQU2 VDDQ D VSSQ VDDQ DMU DQU0 VSSQ VDD E VSS VSSQ DQL0 DML VSSQ VDDQ F VDDQ DQL2 DQSL DQL1 DQL3 VSSQ G VSSQ DQL6 DQSL VDD VSS VSSQ H VREFDQ VDDQ DQL4 DQL7 DQL5 VDDQ J NC VSS RAS CK VSS NC K ODT VDD CAS CK VDD CKE L NC CS WE A10/AP ZQ NC M VSS BA0 BA2 NC(A15) VREFCA VSS N VDD A3 A0 A12/BC BA1 VDD P VSS A5 A2 A1 A4 VSS R VDD A7 A9 A11 A6 VDD T VSS RESET NC(A13) NC(A14) A8 VSS Note: NC balls have no internal connection. NC(A13), NC(A14) and NC(A15) are one of NC pins and reserved for higher densities. Integrated Silicon Solution, Inc. www.issi.com 2 Rev. I1 02/14/2018