IS61WV3216BLL-12TLI-TR

IS64WV3216BLL IS61WV3216BLL 32K x 16 HIGH-SPEED CMOS STATIC RAM JULY 2009 FEATURES DESCRIPTION The ISSI IS61/64WV3216BLL is a high-speed, 524,288-bit High-speed access time: static RAM organized as 32,768 words by 16 bits. It 12 ns: 3.3V + 10% is fabricated using ISSI s high-perfor mance CMOS 15 ns: 2.5V-3.6V technology. This highly reliable process coupled with in- novative circuit design techniques, yields access times as CMOS low power operation: fast as 12ns (3.3V + 10%) and 15ns (2.5V-3.6V) with low 50 mW (typical) operating power consumption. 25 W (typical) standby When CE is HIGH (deselected), the device assumes TTL compatible interface levels a standby mode at which the power dissipation can be Fully static operation: no clock or refresh reduced down with CMOS input levels. required Three state outputs Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Data control for upper and lower bytes Write Enable (WE) controls both writing and reading of the Automotive Temperature Available memor y. A data byte allows Upper Byte (UB) and Lower Lead-free available Byte (LB) access. T h e I S 6 1 / 6 4 W V 3 2 1 6 B L L i s p a ck a g e d i n t h e J E D E C standard 44-pin TSOP-II, and 48-pin mini BGA (6mm x 8mm). FUNCTIONAL BLOCK DIAGRAM 32K x 16 A0-A14 DECODER MEMORY ARRAY V DD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CE OE CONTROL WE CIRCUIT UB LB Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. B 07/22/09IS64WV3216BLL IS61WV3216BLL PIN CONFIGURATIONS 44-Pin TSOP-II 48-Pin mini BGA (6mm x 8mm) 1 2 3 4 5 6 44 A0 NC 1 43 A1 A14 2 42 A2 A13 3 41 OE A12 4 40 UB A11 5 A LB OE A0 A1 A2 NC 39 LB CE 6 38 I/O15 I/O0 7 I/O UB A3 A4 CE I/O B 8 0 37 I/O14 I/O1 8 36 I/O13 I/O2 9 I/O I/O A5 A6 I/O I/O C 9 10 1 2 35 I/O12 I/O3 10 GND I/O NC A7 I/O VDD 11 3 34 GND D VDD 11 33 VDD GND 12 VDD I/O NC NC I/O GND 12 4 E 32 13 I/O11 I/O4 31 I/O10 I/O I/O5 14 14 I/O A14 NC I/O I/O F 13 5 6 30 I/O9 I/O6 15 I/O NC A12 WE 15 A13 I/O G 7 29 I/O8 I/O7 16 28 NC WE 17 NC A8 A9 A10 A11 NC H 27 A3 A10 18 26 A4 A9 19 25 A8 20 A5 24 A6 A7 21 23 NC NC 22 PIN DESCRIPTIONS A0-A14 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection Vdd Power GND Ground 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. B 07/22/09