Product Information


IS61WV6416BLL-12TLI-TR electronic component of ISSI

ISSI SRAM 1Mb 64Kx16 12ns3.3v Async SRAM 3.3v

Manufacturer: ISSI
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges

Price (USD)

1: USD 2.8485 ea
Line Total: USD 2.8485

1886 - Global Stock
Ships to you between
Thu. 12 Oct to Mon. 16 Oct
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1886 - Global Stock

Ships to you between Thu. 12 Oct to Mon. 16 Oct

MOQ : 1
Multiples : 1
1 : USD 2.8485
10 : USD 2.4
100 : USD 2.15
250 : USD 2.004
500 : USD 2.004
1000 : USD 1.908
2000 : USD 1.848
5000 : USD 1.788
10000 : USD 1.752

Product Category
Memory Size
1 mb it
64 K X 16
Access Time
12 ns
Interface Type
Supply Voltage - Max
3.63 V
Supply Voltage - Min
2.97 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Package / Case
TSOP II - 44
Supply Current - Max
45 mA
Data Rate
Factory Pack Quantity :
Number Of Ports
Hts Code
Product Type
Memory & Data Storage
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IS64WV6416BLL Long-term Support World Class Quality IS61WV6416BLL 64K x 16 HIGH-SPEED CMOS STATIC RAM APRIL 2019 FEATURES DESCRIPTION The ISSI IS61/64WV6416BLL is a high-speed, 1,048,576- High-speed access time: bit static RAM organized as 65,536 words by 16 bits. 12 ns: 3.3V + 10% It is fabricated using ISSI s high-perfor mance CMOS 15 ns: 2.5V-3.6V technology. This highly reliable process coupled with in- novative circuit design techniques, yields access times as CMOS low power operation: fast as 12ns (3.3V + 10%) and 15ns (2.5V-3.6V) with low 50 mW (typical) operating power consumption. 25 W (typical) standby When CE is HIGH (deselected), the device assumes TTL compatible interface levels a standby mode at which the power dissipation can be Fully static operation: no clock or refresh reduced down with CMOS input levels. required Three state outputs Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Data control for upper and lower bytes Write Enable (WE) controls both writing and reading of the Automotive Temperature Available memor y. A data byte allows Upper Byte (UB) and Lower Lead-free available Byte (LB) access. The IS61/64WV6416BLL is packaged in the JEDEC stan- dard 44-pin TSOP-II, 44-pin 400-mil SOJ, and 48-pin mini BGA (6mm x 8mm). FUNCTIONAL BLOCK DIAGRAM 64K x 16 A0-A15 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CE OE CONTROL WE CIRCUIT UB LB Copyright 2019 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. 1-800-379-4774 1 Rev. C1 04/01/2019 IS64WV6416BLL Long-term Support World Class Quality IS61WV6416BLL PIN CONFIGURATIONS 44-Pin TSOP-II 48-Pin mini BGA (6mm x 8mm) 1 2 3 4 5 6 44 A0 A15 1 43 A1 A14 2 42 A2 A13 3 41 OE A12 4 40 UB A11 5 A LB OE A0 A1 A2 NC 39 LB CE 6 38 I/O15 I/O0 7 I/O UB A3 A4 CE I/O B 8 0 37 I/O14 I/O1 8 36 I/O13 I/O2 9 I/O I/O A5 A6 I/O I/O C 9 10 1 2 35 I/O12 I/O3 10 GND I/O NC A7 I/O VDD 11 3 34 GND D VDD 11 33 VDD GND 12 VDD I/O NC NC I/O GND 12 4 E 32 13 I/O11 I/O4 31 I/O10 I/O I/O5 14 14 I/O A14 A15 I/O I/O F 13 5 6 30 I/O9 I/O6 15 I/O NC A12 WE 15 A13 I/O G 7 29 I/O8 I/O7 16 28 NC WE 17 NC A8 A9 A10 A11 NC H 27 A3 A10 18 26 A4 A9 19 25 A8 20 A5 24 A6 A7 21 23 NC NC 22 44-Pin SOJ (K) A15 1 44 A0 PIN DESCRIPTIONS A14 2 43 A1 A13 3 42 A2 A0-A15 Address Inputs A12 4 41 OE I/O0-I/O15 Data Inputs/Outputs A11 5 40 UB CE 6 39 LB CE Chip Enable Input I/O0 7 38 I/O15 OE Output Enable Input I/O1 8 37 I/O14 I/O2 9 36 I/O13 WE Write Enable Input I/O3 10 35 I/O12 LB Lower-byte Control (I/O0-I/O7) VDD 11 34 GND UB Upper-byte Control (I/O8-I/O15) GND 12 33 VDD I/O4 13 32 I/O11 NC No Connection I/O5 14 31 I/O10 Vdd Power 30 I/O6 15 I/O9 I/O7 16 29 I/O8 GND Ground WE 17 28 NC A10 18 27 A3 A9 19 26 A4 A8 20 25 A5 A7 21 24 A6 NC 22 23 NC 2 Integrated Silicon Solution, Inc. 1-800-379-4774 Rev. C1 04/01/2019

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Integrated Silicon Solution
Integrated Silicon Solution ()
Integrated Silicon Solution (ISSI)
ISSI(Integrated Silicon Solution)
ISSI, Integrated Silicon Solution Inc