IS62WV10248BLL-55BLI

IS62WV10248BLL ISSI MARCH 2006 1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES DESCRIPTION High-speed access time: 55ns, 70ns The ISSI IS62WV10248BLL is a high-speed, 8M bit static RAMs organized as 1M words by 8 bits. It is fabricated using CMOS low power operation: ISSI s high-performance CMOS technology. This highly reliable process coupled with innovative circuit design 36 mW (typical) operating techniques, yields high-performance and low power 12 W (typical) CMOS standby consumption devices. TTL compatible interface levels When CS1 is HIGH (deselected) or when CS2 is LOW (deselected), the device assumes a standby mode at which Single power supply: the power dissipation can be reduced down with CMOS input levels. 2.5V--3.6V VDD (IS62WV10248BLL) Easy memory expansion is provided by using Chip Enable Fully static operation: no clock or refresh and Output Enable inputs. The active LOW Write Enable required (WE) controls both writing and reading of the memory. Three state outputs The IS62WV10248BLL is packaged in the JEDEC standard 48-pin mini BGA (7.2mm x 8.7mm). Industrial temperature available Lead-free available FUNCTIONAL BLOCK DIAGRAM 1M x 8 A0-A19 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O DATA I/O0-I/O7 CIRCUIT CS2 CS1 CONTROL CIRCUIT OE WE Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. C 03/17/06 IS62WV10248BLL ISSI PIN DESCRIPTIONS A0-A19 Address Inputs CS1 Chip Enable 1 Input CS2 Chip Enable 2 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output NC No Connection VDD Power GND Ground PIN CONFIGURATION 48-pin mini BGA (B) (7.2mm x 8.7mm) 1 2 3 4 5 6 NC OE A A A CS2 0 1 2 A NC NC A A 3 4 CS1 NC B NC I/O A A NC I/O 0 5 6 4 C GND A A I/O 17 7 I/O VDD 1 5 D VDD I/O NC A I/O GND 2 16 6 E I/O A NC 3 NC 14 A I/O 15 7 F A A NC NC 12 13 WE NC G A A A A A A 18 8 9 10 11 19 H 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. C 03/17/06