Product Information

IS62WV1288DBLL-45TLI

IS62WV1288DBLL-45TLI electronic component of ISSI

Datasheet
ISSI SRAM 1M (128Kx8) 45ns Async SRAM

Manufacturer: ISSI
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - Global Stock

MOQ : 1500
Multiples : 1500
1500 : USD 1.2534
4500 : USD 1.2293
9000 : USD 1.1992
N/A

Obsolete
0 - Global Stock

MOQ : 156
Multiples : 156
156 : USD 2.0931
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Memory Size
Access Time
Supply Voltage - Max
Supply Voltage - Min
Maximum Operating Temperature
Minimum Operating Temperature
Mounting Style
Package / Case
Packaging
Supply Current - Max
Data Rate
Series
Type
Brand
Factory Pack Quantity :
Number Of Ports
Cnhts
Hts Code
Mxhts
Product Type
Subcategory
Tradename
LoadingGif

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Long-term Support IS62WV1288DALL/DBLL World Class Quality IS65WV1288DALL/DBLL 128K x 8 LOW VOLTAGE, NOVEMBER 2016 ULTRA LOW POWER CMOS STATIC RAM FEATURES DESCRIPTION The ISSI IS62/65WV1288DALL and IS62/65WV1288DBLL High-speed access time: 35ns, 45ns, 55ns are high-speed, 1M bit static RAMs organized as CMOS low power operation: 128K words by 8 bits. It is fabr icated using ISSI s high- perfor mance CMOS technology. This highly reliable process 12 mW (typical) operating coupled with innovative circuit design techniques, yields 4 W (typical) CMOS standby high-performance and low power consumption devices. TTL compatible interface levels When CS1 is HIGH (deselected) or when CS2 is LOW (deselected), the device assumes a standby mode at Single power supply: which the power dissipation can be reduced down with CMOS input levels. 1.65V--2.2V Vdd (62WV1288d ALL) Easy memory expansion is provided by using Chip Enable 2.3V--3.6V Vdd (62WV1288dBLL) and Output Enable inputs. The active LOW Wr ite Enable Fully static operation: no clock or refresh (WE) controls both writing and reading of the memory. required The IS62/65WV1288DALL and IS62/65WV1288DBLL are packaged in the JEDEC standard 32-pin TSOP (TYPEI), Three state outputs sTSOP (TYPEI), SOP, and 36-pin mini BGA. Industr ial and automotive temperature suppor t Lead-free available FUNCTIONAL BLOCK DIAGRAM 128K x 8 A0-A16 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O I/O0-I/O7 DATA CIRCUIT CS2 CS1 CONTROL CIRCUIT OE WE Copyright 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat- est version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason- ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. C1 11/1/2016 Long-term Support IS62WV1288DALL/DBLL World Class Quality IS65WV1288DALL/DBLL PIN CONFIGURATION 32-pin TSOP (TYPE I) (T), 32-pin sTSOP (TYPE I) (H) 36-pin mini BGA (B) (6mm x 8mm) 1 2 3 4 5 6 32 OE A11 1 31 A10 A9 2 30 CS1 A8 3 29 I/O7 A13 4 A A0 A1 CS2 A3 A6 A8 28 I/O6 WE 5 27 I/O5 B I/O4 A2 WE A4 A7 I/O0 CS2 6 26 I/O4 A15 7 C I/O5 NC A5 I/O1 25 I/O3 VDD 8 GND VDD D 24 GND NC 9 VDD GND E 23 I/O2 10 A16 22 I/O1 A14 11 I/O6 NC NC I/O2 F 21 I/O0 A12 12 I/O7 OE A16 A15 I/O3 G CS1 20 A0 A7 13 A9 A10 A12 A13 A14 A11 H 19 A1 A6 14 18 A2 A5 15 17 A3 A4 16 PIN DESCRIPTIONS 32-pin SOP (Q) A0-A16 Address Inputs CS1 Chip Enable 1 Input CS2 Chip Enable 2 Input NC 1 32 VDD OE Output Enable Input A16 2 31 A15 WE Write Enable Input A14 3 30 CS2 A12 4 29 WE I/O0-I/O7 Input/Output A7 5 28 A13 NC No Connection 27 A6 6 A8 Vdd Power A5 7 26 A9 GND Ground A4 8 25 A11 A3 9 24 OE A2 10 23 A10 A1 11 22 CS1 A0 12 21 I/O7 I/O0 13 20 I/O6 I/O1 14 19 I/O5 I/O2 15 18 I/O4 GND 16 17 I/O3 2 Integrated Silicon Solution, Inc. www.issi.com Rev. C1 11/1/2016

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Integrated Silicon Solution
Integrated Silicon Solution ()
Integrated Silicon Solution (ISSI)
INTEGRATED SILICON SOLUTIONS INC
ISSI
ISSI(Integrated Silicon Solution)
ISSI, Integrated Silicon Solution Inc
Lumissil

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