Product Information

IS66WV1M16DBLL-55BLI

IS66WV1M16DBLL-55BLI electronic component of ISSI

Datasheet
ISSI SRAM 16Mb (1Mx16) 55ns Pseudo SRAM

Manufacturer: ISSI
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - Global Stock

MOQ : 480
Multiples : 1
480 : USD 3.7109
N/A

Obsolete
0 - Global Stock

MOQ : 1
Multiples : 1
1 : USD 4.2827
10 : USD 3.7768
100 : USD 3.3749
500 : USD 3.2432
1000 : USD 2.8829
2500 : USD 2.7373
N/A

Obsolete
0 - Global Stock

MOQ : 480
Multiples : 480
480 : USD 3.5879
960 : USD 3.5161
1920 : USD 3.5161
2880 : USD 3.5161
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Memory Size
Organization
Access Time
Supply Voltage - Max
Supply Voltage - Min
Maximum Operating Temperature
Minimum Operating Temperature
Mounting Style
Package / Case
Packaging
Supply Current - Max
Memory Type
Series
Brand
Factory Pack Quantity :
Cnhts
Hts Code
Mxhts
Product Type
Subcategory
LoadingGif

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IS66WV1M16DALL IS66WV1M16DBLL PRELIMINARYINFORMATION MARCH2011 16MbLOW VOLTAGE, ULTRALO WPOWERPSEUDO CMOS STATICRAM FEATURES DESCRIPTION High-speed access time: The I S S I IS66WV1M16DALL/DBLL is a high-speed, 70ns (IS66WV1M16DALL/DBLL) 16M bit static RAMs organized as 1Mb words by 16 55ns (IS66WV1M16DBLL) bits. It is fabricated using I S S I s high-performance CMOS technology. This highly reliable process coupled CMOS low power operation with innovative circuit design techniques, yields high- Single power supply performance and low power consumption devices. Vdd = 1.7V - 1.95V (IS66WV1M16d ALL) When CS1 is HIGH (deselected) or when CS2 is LOW Vdd = 2.5V - 3.6V (IS66WV1M16BLL)d (deselected) or when CS1 is LOW, CS2 is HIGH and both LB and UB are HIGH, the device assumes a standby mode Three state outputs at which the power dissipation can be reduced down with Data control for upper and lower bytes CMOS input levels. Industrial temperature available Easy memory expansion is provided by using Chip Enable Lead-free available and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS66WV1M16DALL/DBLL is packaged in the JEDEC standard 48-ball mini BGA (6mm x 8mm). The device is also available for die sales. FUNCTIONALBLOCKDIAGRAM 1M x 16 A0-A19 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CS2 CS1 OE CONTROL CIRCUIT WE UB LB Copyright 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. 00A 02/04/2011IS66WV1M16DALL IS66WV1M16DBLL PINCONFIGURA TIONS: 48-Ballmini BGA(6mm x 8mm) 1 2 3 4 5 6 A LB OE A0 A1 A2 CS2 I/O UB A3 A4 CS1 I/O B 8 0 I/O I/O A5 A6 I/O I/O 9 10 1 2 C GND I/O A17 A7 I/O VDD D 11 3 VDD I/O NC A16 I/O GND E 12 4 I/O I/O A14 A15 I/O I/O F 14 13 5 6 I/O A19 A12 A13 WE I/O G 15 7 A18 A9 A10 A11 NC A8 H Note: TSOP package option is under evaluation. PINDESCRIPTIONS A0-A19 Address Inputs I/O0-I/O15 Data Inputs/Outputs CS1, CS2 Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection Vdd Power GND Ground 2 Integrated Silicon Solution, Inc. www.issi.com Rev. 00A 02/04/2011

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Integrated Silicon Solution
Integrated Silicon Solution ()
Integrated Silicon Solution (ISSI)
INTEGRATED SILICON SOLUTIONS INC
ISSI
ISSI(Integrated Silicon Solution)
ISSI, Integrated Silicon Solution Inc
Lumissil

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