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CPC5902G_5903G-EVAL

CPC5902G_5903G-EVAL electronic component of IXYS

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Interface Development Tools CPC5902G / CPC5903G Eval Board

Manufacturer: IXYS
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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1: USD 75.4342 ea
Line Total: USD 75.43

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CPC5902G/CPC5903G Evaluation Board Users Guide INTEGRATED CIRCUITS DIVISION VDDA GNDA GNDB VDDB 1001 R6 R1 2701 1001 R2 JP10 JP9 R5 1501 CPC5902/3 VDDA VDDB GNDA GNDB SCLA SCLB SDAA SDAB 1001 R3 1501 R7 1001 R4 2701 04-26-12 R8 CPC5902/3-EVAL. PCB The CPC5902G/5903G Evaluation Board can be used At the top left of the board are duplicate posts, which 2 are electrically shorted to the VDDA and GNDA posts to isolate an I C bus, and to evaluate the performance on the left side of the board. These two posts enable obtainable when communicating between the user s convenient operation in standalone mode, when a full 2 I C devices. The 8-pin DIP socket can be populated 2 I C bus may not be available at sideA. Similarly, at the with either a CPC5902G (for both SCL and SDA top right of the board, there are duplicates of the bidirectional) or with a CPC5903G (for SDA VDDB and GNDB posts. The CPC5902G and bidirectional, SCL sideA to sideB only). CPC5903G will each operate correctly for 2.7V < VDDA < 5.5V and 2.7V < VDDB < 5.5V. At the left side of the board are four 0.1 inch centered posts that carry VDDA, GNDA, SCLA and SDAA. See While it is possible to attach a second lab power the drawing above for signal, component, and jumper supply to VDDA, which is not identical to the supply at locations. Best performance will result if the VDDA and the bus master on sideA, and to operate the board GNDA posts are connected to the same VDD and 2 2 with a live I C interface, this is not the recommended GND as the sideA I C bus master. The SCLA post mode of operation. The same is true for connecting a 2 should be connected to the I C serial clock line SCL at second, non-identical lab power supply to VDDB. The the bus master on sideA. In addition, the SDAA post V and V voltages at the bus isolator are derived IL IH 2 should be connected to the I C serial data line at the from the VDDA and VDDB voltages. Thus, the bus master. On the right side of the board there are switching thresholds will differ, and noise rejection of four posts which carry VDDB, GNDB, SCLB and the bus will be worse if the voltage at VDDA is not 2 SDAB when connected to the sideB I C devices. identical to the voltage at the VDD connected to the devices as well as any pull-up resistors on the rest of the sideA bus segment. Similarly, VDDB should be the same voltage used at the devices and any pull-ups on the sideB bus. If either of VDDA or VDDB is not the UG-CPC590x EvalBd-R00A PRELIMINARY 1 JP3 JP1 C3 JP2 JP4 C1 C6 JP7 JP5 C4 JP8 JP6CPC5902G/CPC5903G Evaluation Board Users Guide INTEGRATED CIRCUITS DIVISION same as that used at devices on their buses, the 0.4V and sink 3.01mA. The CPC5902G/5903G drivers performance of the actual system at power up will not at sideB are only rated for 3mA when used at VDDB be observable. VDDA does not need to be the same less than 4.5V. The sideB drivers are rated for 6mA value as VDDB, but, as mentioned above, should be operation at up to 5.5V. At 5.5V, they will drive to the same voltage as used on the rest of the sideA bus 0.23*5.5=1.265V and will pull 4.4mA if the pull-up is segment. unchanged. At 5.5V, the pull-up resistor would need to be larger than 705 to limit I to less than 6mA. OL The posts at JP1 on the SCLA line can be used with a 0.1-inch header jumper to add 500 (nominal) of pull-up resistance to the SCLA line. Similarly JP3 adds 500 of pull-up resistance to the SDAA line. These jumpers are generally not used if there are already minimum value pull-up resistors elsewhere on the bus. For operation at 3.3V at VDDA and a bus driver delivering 0.4V active low, the I current will be OL 2.9V/500 = 5.8mA. This is close to the minimum 2 guaranteed value of 6mA for I C fast mode. For operation at 5V, this resistance should be increased: 5.0-0.4=4.6V and 4.6V/6mA = 766. The 500 has been implemented by using R1=R2=1k in parallel. A quick way to evaluate a 5V system would be to use a soldering iron to remove either R1 or R2 to increase the resistance to 1k however, slightly faster operation would result from using a pull-up resistor of perhaps 820. In systems with significant cable length, it is often preferred to split the pull-up resistance by paralleling a physical resistor at both ends of the non-isolated bus segment. To evaluate the performance of a bisected pull-up, a soldering iron can be used to remove either R1 or R2, and a 1k resistor (for a 3.3V system) can be added, if necessary, near the bus master on the sideA bus segment. The 2 posts at JP2 and JP4 can be jumpered to add 390pF of capacitive load to the SCLA and SDAA lines. 2 2 These jumpers can be used to load the I C lines to I C fast modes worst case: 400pF in standalone mode. The jumpers can also be used to add capacitance to the sideA bus segment if it is extremely lightly loaded, but loading beyond 400pF total does not guarantee 2 operation at 400kHz by the I C fast mode specification. On the right side, the posts at JP5 and JP7 can be used to add 964 pull-ups to the SCLB and SDAB lines. For VDDB = 3.3V and V = 0.23VDDB=0.76V, OL this would yield 3.3 - 0.76 = 2.54V across 964, or 2.635mA of output current sunk by the sideB drivers. Other devices on the sideB bus might drive to V = OL 2 PRELIMINARY R00A

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