MX25L6473E MX25L6473E 3V, 64M-BIT x 1/x 2/x 4 CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY Key Features Multi I/O Support - Single I/O, Dual I/O and Quad I/O Auto Erase and Auto Program Algorithms Continuous Program mode Permanently fixed QE bit, QE=1 and 4 I/O mode is enabled P/N: PM1907 REV. 1.4, JUN. 16, 2015 1MX25L6473E Contents 1. FEATURES ........................................................................................................................................................ 4 2. GENERAL DESCRIPTION ............................................................................................................................... 6 Table 1. Read Performance ..................................................................................................................6 3. PIN CONFIGURATION ...................................................................................................................................... 7 4. PIN DESCRIPTION ............................................................................................................................................ 7 5. BLOCK DIAGRAM ............................................................................................................................................. 8 6. DATA PROTECTION .......................................................................................................................................... 9 Table 2. Protected Area Sizes ..............................................................................................................10 Table 3. 4K-bit Secured OTP Definition ............................................................................................... 11 7. MEMORY ORGANIZATION ............................................................................................................................. 12 Table 4. Memory Organization .............................................................................................................12 8. DEVICE OPERATION ...................................................................................................................................... 13 9. COMMAND DESCRIPTION ............................................................................................................................. 14 Table 5. Command Sets .......................................................................................................................14 9-1. Write Enable (WREN) ..........................................................................................................................17 9-2. Write Disable (WRDI) ...........................................................................................................................18 9-3. Read Identification (RDID) ...................................................................................................................19 9-4. Read Status Register (RDSR) .............................................................................................................20 9-5. Write Status Register (WRSR) .............................................................................................................23 Table 6. Protection Modes ....................................................................................................................24 9-6. Read Data Bytes (READ) ....................................................................................................................26 9-7. Read Data Bytes at Higher Speed (FAST READ) ..............................................................................27 9-8. Dual Read Mode (DREAD) ..................................................................................................................28 9-9. 2 x I/O Read Mode (2READ) ...............................................................................................................29 9-10. Quad Read Mode (QREAD) ................................................................................................................30 9-11. 4 x I/O Read Mode (4READ) ...............................................................................................................31 9-12. Performance Enhance Mode ...............................................................................................................32 9-13. Performance Enhance Mode Reset (FFh) ...........................................................................................32 9-14. Sector Erase (SE) ................................................................................................................................35 9-15. Block Erase (BE) .................................................................................................................................36 9-16. Block Erase (BE32K) ...........................................................................................................................37 9-17. Chip Erase (CE) ...................................................................................................................................38 9-18. Page Program (PP) .............................................................................................................................39 9-19. 4 x I/O Page Program (4PP) ................................................................................................................40 9-20. Continuous Program mode (CP mode) ................................................................................................43 9-21. Deep Power-down (DP) .......................................................................................................................45 9-22. Release from Deep Power-down (RDP), Read Electronic Signature (RES) .......................................46 9-23. Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) .....................................48 9-24. ID Read ................................................................................................................................................49 Table 7. ID Definitions .........................................................................................................................49 9-25. Enter Secured OTP (ENSO) ................................................................................................................49 9-26. Exit Secured OTP (EXSO) ...................................................................................................................49 9-27. Read Security Register (RDSCUR) .....................................................................................................50 Table 8. Security Register Definition ....................................................................................................51 9-28. Write Security Register (WRSCUR) .....................................................................................................52 P/N: PM1907 REV. 1.4, JUN. 16, 2015 2