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47L04-E/P

47L04-E/P electronic component of Microchip

Datasheet
SRAM 4k, 3.0V EERAM EXT

Manufacturer: Microchip
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Price (USD)

1: USD 1.1738 ea
Line Total: USD 1.1738

24 - Global Stock
Ships to you between
Fri. 05 Apr to Thu. 11 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
24 - Global Stock


Ships to you between Fri. 05 Apr to Thu. 11 Apr

MOQ : 1
Multiples : 1

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47L04-E/P
Microchip

1 : USD 0.5284

     
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47L04/47C04/47L16/47C16 2 4K/16K I C Serial EERAM Device Selection Table VCC Max. Clock Temperature Part Number Density (bits) Packages Range Frequency Ranges 47L04 4K 2.7-3.6V 1 MHz I, E P, SN, ST 47C04 4K 4.5-5.5V 1 MHz I, E P, SN, ST 47L16 16K 2.7-3.6V 1 MHz I, E P, SN, ST 47C16 16K 4.5-5.5V 1 MHz I, E P, SN, ST Features Description 4 Kbit/16 Kbit SRAM with EEPROM Backup: The Microchip Technology Inc. 47L04/47C04/47L16/47C16 (47XXX) is a 4/16Kbit - Internally organized as 512 x 8 bits (47X04) or 2,048 x 8 bits (47X16) SRAM with EEPROM backup. The device is organized as 512x 8bits or 2,048x8 bits of memory, and - Automatic Store to EEPROM array upon 2 power-down (using optional external utilizes the I C serial interface. The 47XXX provides capacitor) infinite read and write cycles to the SRAM while - Automatic Recall to SRAM array upon EEPROM cells provide high-endurance nonvolatile power-up storage of data. With an external capacitor, SRAM - Hardware Store pin for manual Store data is automatically transferred to the EEPROM upon operations loss of power. Data can also be transferred manually - Software commands for initiating Store and by using either the Hardware Store pin or software Recall operations control. Upon power-up, the EEPROM data is - Store time 8 ms maximum (47X04) or automatically recalled to the SRAM. Recall can also 25 ms maximum (47X16) be initiated through software control. Nonvolatile External Event Detect Flag The 47XXX is available in the 8-lead PDIP, SOIC, and High Reliability: TSSOP packages. - Infinite read and write cycles to SRAM - More than one million store cycles to Block Diagram EEPROM - Data retention: >200 years - ESD protection: >4,000V VCC Power 2 Control High-Speed I C Interface: VCAP Block - Industry standard 100 kHz, 400 kHz and 1MHz - Zero cycle delay reads and writes SDA 2 Status Register I C Control Logic - Schmitt Trigger inputs for noise suppression SCL Slave Address A2, A1 - Cascadable up to four devices Decoder Write Protection: - Software write protection from 1/64 of SRAM EEPROM 512 x 8 array to whole array 2K x 8 Low-Power CMOS Technology: Memory Address - 200 A active current typical and Data Control HS SRAM STORE - 40 A standby current (maximum) Logic 512 x 8 2K x 8 8-Lead PDIP, SOIC, and TSSOP Packages RECALL Available Temperature Ranges: - Industrial (I): -40C to +85C - Automotive (E): -40C to +125C 2015-2016 Microchip Technology Inc. DS20005371C-page 147L04/47C04/47L16/47C16 Typical Application Schematic Auto Store Mode (ASE = 1) VCC VCC VCC 8 VCC 1 VCAP CVCAP 6 SCL 47XXX PIC MCU 5 SDA 7 HS VSS 4 Typical Application Schematic Manual Store Mode (ASE = 0) VCC VCC VCC 8 VCC 1 VCAP 6 SCL 47XXX PIC MCU 5 SDA 7 HS VSS 4 Package Types PDIP/SOIC/TSSOP (8-pin) VCAP 1 8 VCC A1 2 7 HS A2 3 6 SCL VSS 4 5 SDA DS20005371C-page 2 2015-2016 Microchip Technology Inc.

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
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