APT41F100J 1000V, 42A, 0.20 Max, t 400ns rr N-Channel FREDFET Power MOS 8 is a high speed, high voltage N-channel switch-mode power MOSFET. This FREDFET version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced t , soft rr recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly UL Recognize reduced ratio of C /C result in excellent noise immunity and low switching loss. The rss iss file E145592 IS OTO P intrinsic gate resistance and capacitance of the poly-silicon gate structure help control D APT41F100J di/dt during switching, resulting in low EMI and reliable paralleling, even when switching Single die FREDFET G at very high frequency. S FEATURES TYPICAL APPLICATIONS Fast switching with low EMI ZVS phase shifted and other full bridge Low t for high reliability Half bridge rr Ultra low C for improved noise immunity PFC and other boost converter rss Low gate charge Buck converter Avalanche energy rated Single and two switch forward RoHS compliant Flyback Absolute Maximum Ratings Symbol Parameter Ratings Unit Continuous Drain Current T = 25C 42 C I D Continuous Drain Current T = 100C 27 A C 1 I Pulsed Drain Current 260 DM V Gate-Source Voltage 30 V GS E 2 4075 Single Pulse Avalanche Energy mJ AS I 33 AR Avalanche Current, Repetitive or Non-Repetitive A Thermal and Mechanical Characteristics Min Typ Max Unit Symbol Characteristic P Total Power Dissipation T = 25C W 960 D C R Junction to Case Thermal Resistance 0.13 JC C/W R Case to Sink Thermal Resistance, Flat, Greased Surface 0.15 CS T ,T Operating and Storage Junction Temperature Range C -55 150 J STG V V RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) 2500 Isolation oz 1.03 W T Package Weight g 29.2 inlbf 10 Torque Terminals and Mounting Screws. Nm 1.1 Microsemi Website - Static Characteristics T = 25C unless otherwise speci ed APT41F100J J Symbol Parameter Test Conditions Min Typ Max Unit V V = 0V, I = 250 A Drain-Source Breakdown Voltage 1000 V BR(DSS) GS D V /T Reference to 25C, I = 250 A Breakdown Voltage Temperature Coef cient 1.15 V/C BR(DSS) J D V = 10V, I = 33A R 3 Drain-Source On Resistance 0.18 0.20 DS(on) GS D V Gate-Source Threshold Voltage 2.5 4 5 V GS(th) V = V , I = 5mA GS DS D V /T Threshold Voltage Temperature Coef cient -10 mV/C GS(th) J V = 1000V T = 25C 250 DS J I Zero Gate Voltage Drain Current A DSS V = 0V T = 125C 1000 GS J V = 30V I Gate-Source Leakage Current 100 nA GSS GS Dynamic Characteristics T = 25C unless otherwise speci ed J Symbol Parameter Test Conditions Min Typ Max Unit g V = 50V, I = 33A fs Forward Transconductance 75 S DS D C Input Capacitance 18500 iss V = 0V, V = 25V GS DS C Reverse Transfer Capacitance 245 rss f = 1MHz C Output Capacitance 1555 oss pF 4 C Effective Output Capacitance, Charge Related 635 o(cr) V = 0V, V = 0V to 667V GS DS 5 C Effective Output Capacitance, Energy Related 325 o(er) Q Total Gate Charge 570 g V = 0 to 10V, I = 33A, GS D Q Gate-Source Charge nC gs 100 V = 500V DS Q Gate-Drain Charge gd 270 t Resistive Switching Turn-On Delay Time d(on) 55 t V = 667V, I = 33A Current Rise Time 55 r DD D ns 6 t R = 2.2 , V = 15V Turn-Off Delay Time 235 d(off) G GG t Current Fall Time 55 f Source-Drain Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Unit Continuous Source Current D MOSFET symbol I S 42 showing the (Body Diode) integral reverse p-n A G Pulsed Source Current junction diode I SM 260 (body diode) 1 S (Body Diode) V I = 33A, T = 25C, V = 0V Diode Forward Voltage 1.0 V SD SD J GS T = 25C 400 J t Reverse Recovery Time ns rr T = 125C 800 J 3 I = 33A T = 25C 3.3 SD J Q Reverse Recovery Charge C rr V = 100V T = 125C 8.0 DD J di /dt = 100A/s T = 25C 17.2 SD J I Reverse Recovery Current A rrm T = 125C 24.6 J I 33A, di/dt 1000A/ s, V = 667V, SD DD dv/dt Peak Recovery dv/dt V/ns 25 T = 125C J 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at T = 25C, L = 7.48mH, R = 25, I = 33A. J G AS 3 Pulse test: Pulse Width < 380 s, duty cycle < 2%. 4 C is de ned as a xed capacitance with the same stored charge as C with V = 67% of V . o(cr) OSS DS (BR)DSS 5 C is de ned as a xed capacitance with the same stored energy as C with V = 67% of V . To calculate C for any value of o(er) OSS DS (BR)DSS o(er) V less than V use this equation: C = -5.37E-7/V 2 + 9.48E-8/V + 1.83E-10. DS (BR)DSS, o(er) DS DS 6 R is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) G Microsemi reserves the right to change, without notice, the speci cations and information contained herein. 050-8128 Rev C 8-2011