Features Single 3.3V 10% Supply Fast Read Access Time 200 ns Automatic Page Write Operation Internal Address and Data Latches for 128 Bytes Internal Control Timer Fast Write Cycle Time Page Write Cycle Time 10 ms Maximum 1 to 128-Byte Page Write Operation 1-Megabit Low Power Dissipation 15 mA Active Current (128K x 8) 20 A CMOS Standby Current Hardware and Software Data Protection Low Voltage DATA Polling for End of Write Detection High Reliability CMOS Technology Paged Parallel 5 Endurance: 10 Cycles Data Retention: 10 Years EEPROMs JEDEC Approved Byte-Wide Pinout Industrial Temperature Range Green (Pb/Halide-free) Packaging Option Only AT28LV010 1. Description The AT28LV010 is a high-performance 3-volt only Electrically Erasable and Program- mable Read-Only Memory. Its 1 megabit of memory is organized as 131,072 words by 8 bits. Manufactured with Atmels advanced nonvolatile CMOS technology, the device offers access times to 200 ns with power dissipation of just 54 mW. When the device is deselected, the CMOS standby current is less than 20 A. The AT28LV010 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 128-byte page register to allow writing of up to 128 bytes simultaneously. During a write cycle, the address and 1 to 128 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA polling of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmels 28LV010 has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. Software data protection is implemented to guard against inadvertent writes. The device also includes an extra 128 bytes of EEPROM for device identification or tracking. 0395FPEEPR08/09AT28LV010 2.2 32-lead TSOP Top View 2. Pin Configurations Pin Name Function A11 1 32 OE A0 - A16 Addresses A9 2 31 A10 A8 3 30 CE CE Chip Enable A13 4 29 I/O7 Output Enable OE A14 5 28 I/O6 WE Write Enable NC 6 27 I/O5 WE 7 I/O4 26 I/O0 - I/O7 Data Inputs/Outputs VCC 8 I/O3 25 NC No Connect NC 9 GND 24 A16 10 I/O2 23 DC Dont Connect 11 I/O1 A15 22 A12 12 21 I/O0 A7 13 20 A0 A6 14 19 A1 A5 15 18 A2 A4 16 17 A3 2.1 32-lead PLCC Top View A7 5 29 A14 A6 6 28 A13 A5 7 27 A8 A4 8 26 A9 A3 9 25 A11 A2 10 24 OE A1 11 23 A10 A0 12 22 CE I/O0 13 21 I/O7 2 0395FPEEPR08/09 I/O1 14 4 A12 I/O2 15 3 A15 GND 16 2 A16 I/O3 17 1 DC I/O4 18 32 VCC I/O5 19 31 WE I/O6 20 30 NC