Features Incorporates the ARM7TDMI ARM Thumb Processor High-performance 32-bit RISC Architecture High-density 16-bit Instruction Set Leader in MIPS/Watt In-circuit Emulation, Debug Communication Channel Support EmbeddedICE Internal High-speed Flash 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU Single Cycle Access at Up to 30 MHz in Worst Case Conditions Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 Fast Flash Programming Interface for High Volume Production 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed One External Bus Interface (EBI) Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash Memory Controller (MC) Embedded Flash Controller Summary Memory Protection Unit Abort Status and Misalignment Detection Reset Controller (RSTC) Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector Provides External Reset Signal Shaping and Reset Source Status Clock Generator (CKGR) Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL Power Management Controller (PMC) Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode Three Programmable External Clock Signals Advanced Interrupt Controller (AIC) Individually Maskable, Eight-level Priority, Vectored Interrupt Sources Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected Debug Unit (DBGU) Two-wire UART and Support for Debug Communication Channel interrupt, NOTE: This is a summary document. The complete document is available on Programmable ICE Access Prevention the Atmel website at www.atmel.com. Mode for General Purpose Two-wire UART Serial Communication Periodic Interval Timer (PIT) 20-bit Programmable Counter plus 12-bit Interval Counter Windowed Watchdog (WDT) 6222GSATARM6-Sep-11 12-bit key-protected Programmable Counter Provides Reset or Interrupt Signals to the System Counter May Be Stopped While the Processor is in Debug State or in Idle Mode Real-time Timer (RTT) 32-bit Free-running Counter with Alarm Runs Off the Internal RC Oscillator Three Parallel Input/Output Controllers (PIO) Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os Input Change Interrupt Capability on Each I/O Line Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output Schmitt Trigger on All inputs Eleven Peripheral DMA Controller (PDC) Channels One USB 2.0 Full Speed (12 Mbits per second) Device Port On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs One Synchronous Serial Controller (SSC) Independent Clock and Frame Sync Signals for Each Receiver and Transmitter IS Analog Interface Support, Time Division Multiplex Support High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) Infrared Modulation/Demodulation Individual Baud Rate Generator, IrDA Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support Full Modem Line Support on USART1 One Master/Slave Serial Peripheral Interfaces (SPI) 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counter (TC) Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller (PWMC) One Two-wire Interface (TWI) Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported General Call Supported in Slave Mode One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os SAM-BA Default Boot program Interface with SAM-BA Graphic User Interface IEEE 1149.1 JTAG Boundary Scan on All Digital Pins Four High-current Drive I/O lines, Up to 16 mA Each Power Supplies Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply 1.8V VDDCORE Core Power Supply with Brownout Detector Fully Static Operation: Up to 55 MHz at 1.8V and 85 C Worst Case Conditions Up to 48 MHz at 1.65V and 85 C Worst Case Conditions Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package 2 SAM7SE512/256/32 Summary 6222GSATARM6-Sep-11