ARM-based Flash MCU
SAM4C16C SAM4C8C
DATASHEET
Description
The Atmel SAM4C16C and SAM4C8C microcontrollers are system-on-chip solutions
for smart energy applications, built around two high-performance 32-bit ARM Cor-
tex -M4 RISC processors.
These devices operate at a maximum speed of 120 MHz and feature up to 1 Mbyte
of embedded Flash, 152 Kbytes of SRAM and on-chip cache for each core.
The dual ARM Cortex-M4 architecture allows for integration of application layer, com-
munications layers and security functions in a single device, with the ability to extend
program and data memory via a 16-bit external bus interface.
The peripheral set includes advanced cryptographic engine, anti-tamper, floating point
unit (FPU), five USARTs, two UARTs, two TWIs, up to seven SPIs, as well as a PWM
timer, two 3-channel general-purpose 16-bit timers, temperature compensable low-
power RTC running on backup area down to 0.5 A, and a 50 x 6 segmented LCD
controller.
The SAM4C series is a scalable platform providing, alongside Atmel's industry leading
SAM4 standard microcontrollers, unprecedented cost structure, performance and flex-
ibility to smart meter designers worldwide.
11102CATARM16-Jan-14Features
Application/ Master Core
(1)
ARM Cortex-M4 running at up to 120 MHz
Memory Protection Unit (MPU)
DSP Instruction
Thumb -2 instruction set
Instruction and Data Cache Controller with 2 Kbytes Cache Memory
Memories
Up to 1 Mbyte of Embedded Flash for Program Code (I-Code bus) and Program Data (D-Code bus)
with Built-in ECC (2-bit error detection and 1-bit correction per 128 bits)
128 Kbytes of Embedded SRAM (SRAM0) for Program Data (System bus)
8 Kbytes ROM with embedded boot loader routines (UART) and In-Application Programming (IAP)
routines
Coprocessor (provides ability to separate application, communication or metrology functions)
(1)
ARM Cortex-M4F running at up to 120 MHz
IEEE 754 Compliant, Single precision Floating-Point Unit (FPU)
DSP Instruction
Thumb-2 instruction set
Instruction and Data Cache Controller with 2 Kbytes Cache Memory
Memories
16 Kbytes of Embedded SRAM (SRAM1) for Program Code (I-Code bus) and Program Data (D-Code
bus and System bus)
8 Kbytes of Embedded SRAM (SRAM2) for Program Data (System bus)
Symmetrical/Asynchronous Dual Core Architecture
Interrupt-based Interprocessor Communication
Asynchronous Clocking
One Interrupt Controller (NVIC) for each core
Each Peripheral IRQ routed to each NVIC Input
Cryptography
High-performance AES 128 to 256 with various modes (GCM, CBC, ECB, CFB, CBC-MAC, CTR)
TRNG (up to 38 Mbit/s stream, with tested diehard and fips)
Public Key Crypto accelerator and associated ROM library for RSA, ECC, DSA, ECDSA
Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA assisted
Safety
4 Physical Anti-tamper Detection I/O with Time Stamping and General Backup Registers Immediate Clear
Security bit for Device Protection from JTAG accesses
Shared System Controller
Power Supply
Embedded Core and LCD Voltage Regulator for single supply operation
Power-on-Reset (POR), Brownout Detector (BOD) and Dual Watchdog for safe operation
Ultra-low-power Backup mode (< 0.5 A Typical @ 25C)
Clock
Optional 3 to 20 MHz Quartz or ceramic resonator oscillators with Clock Failure Detection
Ultra-low-power 32.768 kHz crystal oscillator for RTC with Frequency Monitoring
High precision 4/8/12 MHz factory trimmed internal RC oscillator with on-the-fly trimming capability
SAM4C Series [DATASHEET] 2
11102CATARM16-Jan-14