Product Information

KSZ9897STXC-TR

KSZ9897STXC-TR electronic component of Microchip

Datasheet
Ethernet ICs 7-port GigE Managed Switch with SGMII EEE WOL QoS LinkMD

Manufacturer: Microchip
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Price (USD)

1: USD 15.498 ea
Line Total: USD 15.5

851 - Global Stock
Ships to you between
Thu. 23 May to Mon. 27 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
961 - WHS 1


Ships to you between Thu. 23 May to Mon. 27 May

MOQ : 1
Multiples : 1

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KSZ9897STXC-TR
Microchip

1 : USD 14.145
25 : USD 12.88
100 : USD 12.443
500 : USD 12.305
1000 : USD 12.2935

     
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RoHS - XON
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KSZ9897S 7-Port Gigabit Ethernet Switch with SGMII and RGMII/MII/RMII Interfaces One External MAC Port with SGMII Highlights One External MAC Port with RGMII/MII/RMII One port with 10/100/1000 Ethernet MAC - RGMII v2.0, RMII v1.2 with 50MHz reference clock and SGMII interface input/output option, MII in PHY/MAC mode One port with 10/100/1000 Ethernet MAC Five Integrated PHY Ports and configurable RGMII/MII/RMII interface - 1000BASE-T/100BASE-TX/10BASE-Te IEEE 802.3 IEEE 802.1X access control support - Fast Link-up option significantly reduces link-up time Five ports with integrated 10/100/1000BASE-T PHY - Auto-negotiation and Auto-MDI/MDI-X support transceivers - On-chip termination resistors and internal biasing for Non-blocking wire-speed Ethernet switching fabric differential pairs to reduce power - LinkMD cable diagnostic capabilities for determining Full-featured forwarding and filtering control, includ- cable opens, shorts, and length ing Access Control List (ACL) filtering Advanced Switch Capabilities Full VLAN and QoS support - IEEE 802.1Q VLAN support for 128 active VLAN EtherGreen power management features, groups and the full range of 4096 VLAN IDs including low power standby - IEEE 802.1p/Q tag insertion/removal on per port basis 2 Flexible management interface options: SPI, I C, - VLAN ID on per port or VLAN basis MIIM, and in-band management via any port - IEEE 802.3x full-duplex flow control and half-duplex Commercial/Industrial temperature range support back pressure collision control 128-pin TQFP-EP (14 x 14mm) RoHS compliant pkg - IEEE 802.1X access control (Port-based and MAC address based) Target Applications - IGMP v1/v2/v3 snooping for multicast packet filtering - IPv6 multicast listener discovery (MLD) snooping Stand-alone 10/100/1000Mbps Ethernet switches - IPv4/IPv6 QoS support, QoS/CoS packet prioritization VoIP infrastructure switches - 802.1p QoS packet classification with 4 priority queues Broadband gateways/firewalls - Programmable rate limiting at ingress/egress ports Wi-Fi access points - Broadcast storm protection Integrated DSL/cable modems - Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class Security/surveillance systems - MAC filtering function to filter or forward unknown uni- Industrial control/automation switches cast, multicast and VLAN packets Networked measurement and control systems - Self-address filtering for implementing ring topologies Comprehensive Configuration Registers Access Features 2 - High-speed 4-wire SPI (up to 50MHz), I C interfaces Switch Management Capabilities provide access to all internal registers - 10/100/1000Mbps Ethernet switch basic functions: - MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers frame buffer management, address look-up table, queue management, MIB counters - In-band management via any of the data ports - Non-blocking store-and-forward switch fabric assures - I/O pin strapping facility to set certain register bits from fast packet delivery by utilizing 4096 entry forwarding I/O pins at reset time table with 256kByte frame buffer - On-the-fly configurable control registers - Jumbo packet support up to 9000 bytes Power Management - Port mirroring/monitoring/sniffing: - Energy detect power-down mode on cable disconnect ingress and/or egress traffic to any port - Dynamic clock tree control - MIB counters for fully-compliant statistics gathering - Unused ports can be individually powered down 34 counters per port - Full-chip software power-down - Tail tagging mode (one byte added before FCS) sup- - Wake-on-LAN (WoL) standby power mode with PME port at host port to inform the processor which ingress interrupt output for system wake upon triggered events port receives the packet and its priority - Loopback modes for remote failure diagnostics - Rapid spanning tree protocol (RSTP) support for topol- ogy management and ring/linear recovery - Multiple spanning tree protocol (MSTP) support 2017 Microchip Technology Inc. DS00002394A-page 1KSZ9897S TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Documentation To obtain the most up-to-date version of this documentation, please register at our Worldwide Web site at:

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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