Le79228 Quad Intelligent Subscriber Line Audio-processing Circuit VE790 Series A Voice Solution APPLICATIONS ORDERING INFORMATION 1 2 Voice over IP/DSL Integrated Access Devices (IAD), Device Package Packing Smart Residential Gateways (SRG), Home Gateway/ Le79Q2281DVC 64-pin TQFP (Green) Tray Router Le79Q2284MVC 80-pin LQFP (Green) Tray Cable Telephony NIU, Set-Top Box, Home Side Box, Cable Modem, Cable PC 1. The green package meets RoHS Directive 2002/95/EC of the European Council to minimize the environmental impact of Fiber Fiber in the Loop (FITL), Fiber to the electrical equipment. Home (FTTH) 2. For delivery using a tape and reel packing system, add a suffix Wireless Local Loop, Intelligent PBX to the OPN (Ordering Part Number) when placing an order. DLC-MUX CO DESCRIPTION The Le79228 Quad Intelligent Subscriber Line Audio- processing Circuit (ISLAC) device, in combination with a FEATURES VE790 series ISLIC device, implements a four-channel universal telephone line interface. This enables the design of a High performance digital signal processor provides single, low cost, high performance, fully software programmable control of all major line card functions programmable line interface for multiple country applications. A-law/-law and linear codec/filter All AC, DC, and signaling parameters are fully programmable via microprocessor or GCI interfaces. Additionally, the Transmit and receive gain Le79228 Quad ISLAC device has integrated self-test and line- Two-wire AC impedance test capabilities to resolve faults to the line or line circuit. The Transhybrid balance integrated test capability is crucial for remote applications Equalization where dedicated test hardware is not cost effective. DC loop feeding Smooth or abrupt polarity reversal RELATED LITERATURE Loop supervision 081237 Le79232 Dual ISLIC Device Data Sheet Off-hook debounce circuit 081152 Le79242 Dual ISLIC Device Data Sheet Ground-key and ring-trip filters 081185 Le79252 Dual ISLIC Device Data Sheet Internal ringing generation and integrated ring-trip 081191 Le75282 Dual LCAS Device Data Sheet detection 080923 Le792x2 Le79228 Chip Set Users Guide Adaptive hybrid balance Line and circuit testing 081151 Le79112 VCP Device Data Sheet Meets GR-909 and GR-844 test requirements BLOCK DIAGRAM Tone generation (DTMF, FSK, random noise, and arbitrary tone) 4 14 VCCA Metering generation at 12 kHz and 16 kHz A1 VCCD LD1 B1 2 Envelope shaping and level control LD2 DGND Dual ISLIC VREF A2 Modem Tone Detection 4 Protection B2 2 I/O1 - I/O4 AGND and LCAS or Selectable PCM/MPI or GCI digital interfaces EMR for 14 TSCA/G A3 External Ringing TSCB Supports most available master clock frequencies from B3 DRA/DD P1-P3 Dual ISLIC 512 kHz to 8.192 MHz LD3 A4 DRB LD4 B4 Quad ISLAC DXB General purpose I/O pins RREF DXA/DU +3.3 V DC operation External 4 5 DCLK/S0 Ringing Sense PCLK/FS Exceeds LSSGR and ITU requirements Resistors MCLK RSHB FS/DCL Supports external ringing with on-chip ring-trip circuit BATH CS/RST RSLB Automatic or manual ring-trip modes BATL DIO/S1 RSPB INT Supports CallerNumber Identification (CID) tone BATP generation Document ID 081256 Date: Sep 19, 2007 NOTE: On August 3, 2007, Zarlink Semiconductor acquired the products and Rev: G Version: 2 technology of Legerity Holdings. Distribution: Protected DocumentLe79228 Data Sheet TABLE OF CONTENTS Applications .1 Features 1 Ordering Information .1 Description 1 Related Literature 1 Block Diagram .1 Product Description 3 Optional VCP Features 4 Le79228 Quad ISLAC Device Internal Block Diagram (80-Pin LQFP) 5 Features of the Le79228 Quad ISLAC Chip Set .6 Connection Diagrams .7 Pin Descriptions 9 Electrical Characteristics .11 Absolute Maximum Ratings 11 Operating Ranges .11 DC Specifications .12 Transmission Specifications .13 Transmit and Receive Paths .14 Attenuation Distortion 15 Group Delay Distortion .16 Single Frequency Distortion 16 Gain Linearity .17 Total Distortion Including Quantizing Distortion .17 Overload Compression .18 Discrimination Against Out-of-Band Input Signals .19 Spurious Out-of-Band Signals at the Analog Output .19 Switching Characteristics .20 Microprocessor Interface 21 PCM Interface 21 Waveforms .23 GCI Timing Specifications .25 ISLIC Device Timing Specifications .26 Application Circuits 28 Line card Parts List- INTERNAL RINGING .30 Line card Parts List - EXTERNAL RINGING 33 Physical Dimensions .35 64-Pin Thin Quad Flat Pack (TQFP) .35 80-Pin Low-Profile Quad Flat Pack (LQFP) .36 Revision History 37 Revision A1 to B1 .37 Revision B1 to C1 .37 Revision C1 to D1 .37 Revision D1 to E1 .37 Revision E1 to F1 .37 Revision F1 to G1 .37 Revision G1 to G2 .37 2 Zarlink Semiconductor Inc.