LPC47N237-MT Microchip

LPC47N237 3.3v I/O Controller for Port Replicators and Docking Stations Product Features Description 3.3 Volt Operation (5V Tolerant) The LPC47N237 is a 3.3V (5V Tolerant) PC99a/ PC2001 compliant Docking I/O controller. The device, 32 SMBus-Hosted General Purpose Input/Output which implements the LPC interface, includes I/O func- Pins tionality. LPC47N237s LPC interface supports LPC I/O - SMBus Slave Controller Enables Read/Write and DMA cycles. There is also a SMBus hosted GPIO Access to GPIO Ports Block. - SMBus Runs on and GPIO Pins are Driven by Suspend Supply (VTR) The LPC47N237 provides 4 LPC general purpose pins - SMBus Interrupt Pin which offer flexibility to the system designer. The leg- - SMBus Isolation Circuitry acy I/O included in the LPC47N237 are: a 16C550A compatible UART one Multi-Mode parallel port includ- PC99a/PC2001 Compliant ing ChiProtect circuitry plus EPP and ECP. The paral- ACPI 1.0/2.0 Compliant lel port is compatible with IBM PC/AT architecture, as Power Management Interface well as IEEE 1284 EPP and ECP. The LPC47N237 LPC Interface incorporates sophisticated power control circuitry - Multiplexed Command, Address and Data (PCC) which includes support for PME. The PCC sup- Bus ports multiple low power-down modes. The - Serial IRQ Interface Compatible with Serial- LPC47N237 is ACPI 1.0b/2.0 compatible. ized IRQ Support for PCI Systems The I/O Address, DMA Channel and hardware IRQ of - nIO PME pin for UART Ring Indicate each logical device in the LPC47N237 may be repro- - PCI Clock Run Support grammed through the internal configuration registers. 4 LPC-Hosted General Purpose Input/Output Pins There are up to 480 (960 for Parallel Port) I/O address Serial Port location options, a Serialized IRQ interface, and three DMA channels. - Full Function Serial Port - High Speed 16C550A Compatible UART with The SMBus hosted GPIO Block includes 32 GPIOs that 16-Byte Send/Receive FIFOs are powered by standby supply. The GPIOs can be - Programmable Baud Rate Generator sup- used to assert an interrupt on a change in state of a ports 230k and 460k Baud GPIO. These events are indicated on the nSMBINT - Modem Control Circuitry pin. - 480 Address and 15 IRQ Options - Ring Indicator Wakeup Event Multi-Mode Parallel Port with ChiProtect - Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bidirectional Parallel Port - Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) - IEEE 1284 Compliant Enhanced Capabilities Port (ECP) - ChiProtect Circuitry for Protection - 480 Address, Up to 15 IRQ and Three DMA Options XNOR-Chain 100 pin TQFP RoHS Compliant Package 2006 - 2014 Microchip Technology Inc. DS00001811A-page 1LPC47N237 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: