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MCP33151-05T-E/MS

MCP33151-05T-E/MS electronic component of Microchip
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Part No.MCP33151-05T-E/MS
Manufacturer: Microchip
Category:Analog to Digital Converters - ADC
Description: Analog to Digital Converters - ADC 14-bit, 500 ksps, single channel, single-ended SAR ADC
Datasheet: MCP33151-05T-E/MS Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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1: USD 2.511 ea
Line Total: USD 2.51

Availability - 2521
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MOQ: 1  Multiples: 1
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Ships to you between Wed. 05 Jun to Fri. 07 Jun

MOQ : 1
Multiples : 1
1 : USD 2.001
25 : USD 1.817
100 : USD 1.7135
5000 : USD 1.7135

     
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MCP33151/41-XX 1 Msps/500 ksps, 14/12-Bit Single-Ended Input SAR ADC AEC-Q100 Qualified: Features - Temperature grade 1: -40C to +125C Sample Rate (Throughput): Package Options: MSOP-10 and TDFN-10 - MCP33151/41-10: 1 Msps - MCP33151/41-05: 500 ksps Typical Applications 14/12-Bit Resolution with No Missing Codes High-Precision Data Acquisition No Latency Output Medical Instruments Wide Operating Voltage Range: Test Equipment - Analog supply voltage (AV ): 1.8V DD Electric Vehicle Battery Management Systems - Digital input/output interface voltage (DV ): IO Motor Control Applications 1.7 - 5.5V Switch-Mode Power Supply Applications - External reference (V ): AV -5.1V REF DD Battery-Powered Equipment Pseudodifferential Input Operation with Single- Ended Configuration: Package Types - Input full-scale range: 0V to +V REF Ultra-Low Current Consumption (typical): - During input acquisition (standby): ~1.5 A MSOP-10 - During conversion: MCP33151/41-10: ~0.66 mA MCP33151/41-05: ~0.33 mA SPI-Compatible Serial Communication: - SCLK clock rate: up to 100 MHz 3-Wire with Optional BUSY Indicator TDFN-10* ADC Self-Calibration for Offset, Gain, and Linearity Errors: - During power-up (automatic) - On-Demand via users command during normal operation Built-In Data Accumulator * Includes Exposed Thermal Pad (EP) see Table 4-1. - Integrate up to 1024 consecutive converted samples - Increase ENOB up to 18 bits by automatically averaging conversion results MCP331X1-XX Device Offering (Note 1) Performance (Typical) Sample Part Number Resolution Input Type Input Range SNR SFDR THD INL DNL Rate (dBFS) (dB) (dB) (LSB) (LSB) MCP33151-10 14-bit 1 Msps Single-Ended 0V to 5.1V 80.4 103.9 -102.5 0.39 0.11 MCP33141-10 12-bit 1 Msps Single-Ended 0V to 5.1V 73.3 102.0 -100.4 0.09 0.05 MCP33151-05 14-bit 500 kSPS Single-Ended 0V to 5.1V 80.4 102.7 -100.9 0.39 0.11 MCP33141-05 12-bit 500 kSPS Single-Ended 0V to 5.1V 73.3 99.9 -99.2 0.09 0.05 Note 1: SNR, SFDR, and THD are measured with f =10 kHz, V =-1 dBFS, V =5.1V. IN IN REF 2019 Microchip Technology Inc. DS20006220A-page 1MCP33151/41-XX Typical Application Diagram AV to 5.1V 1.8V 1.8V to 5.5V DD V AV DV REF DD IO 15 A + IN 0V to V REF SDI 2.2nF MCP331x1-XX CNVST Host Device SCLK A - IN (PIC32MZ) SDO GND Reference of GND Analog Input When the initial power-up sequence is completed, the Description device enters a low-current input acquisition mode, The MCP33151/41-10 and MCP33151/41-05 are where sampling capacitors are connected to the input single-ended, 14-bit and 12-bit, single-channel 1 Msps pins. This mode is called Standby. and 500kSPS ADC family devices, respectively, During Standby mode, most of the internal analog featuring low-power consumption and high circuitry is shut down in order to reduce current performance, using a successive approximation consumption. Typically, the device consumes register (SAR) architecture. approximately 1.5A during Standby. A new The device operates with an external voltage reference conversion is started on the rising edge of CNVST. (V ) from AV to 5.1V, which supports a wide range REF DD When the conversion is complete and the host lowers of input full-scale range from 0V to V . The reference REF CNVST, the output data is presented on SDO, and the voltage setting is independent of the analog supply device enters Standby mode to begin acquiring the voltage (AV ) and is higher than AV The DD DD. next input sample. The user can clock out the ADC conversion output is available through an easy-to-use output data using the SPI-compatible serial clock simple SPI-compatible 3-wire interface. during Standby. The device requires a 1.8V analog supply voltage The ADC system clock is generated by an internal on- (AV ) and a 1.7V to 5.5V digital I/O interface supply DD chip clock, therefore the conversion is performed voltage (DV ). The wide digital I/O interface supply IO independent of the SPI serial clock (SCLK). (DV ) range (1.7V-5.5V) allows the device to interface IO This device can be used for various high-speed and with most host devices (Master) available in the current high-accuracy analog-to-digital data conversion industry, such as the PIC32 microcontrollers, without applications, where design simplicity, low power, and using external voltage level shifters. no output latency are needed. Once all supply voltages are connected, the device will The device is AEC-Q100 qualified for automotive power-up and perform an automatic calibration to applications and operates over the extended minimize offset, gain and linearity errors. The temperature range of -40C to +125C. The available automatic calibration takes place approximately 40 ms package options are Pb-free TDFN-10 and MSOP-10. following power-up, and it is necessary to ensure that all power supplies are fully settled and stable after this time. See Section 4.1.1, Power-Up Sequence and Auto-Calibration for more details. The device performance stays stable across the specified temperature range. However, when extreme changes in the operating environment, such as in the reference voltage, are made with respect to the initial conditions (e.g. the reference voltage did not fully settle during the initial power-up sequence), the user may send a recalibrate command anytime to initiate another self- calibration to restore optimum performance. DS20006220A-page 2 2019 Microchip Technology Inc.

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