MCP47CXBXX 8/10/12-bit Digital-to-Analog Converters, 1 LSb INL Single/Dual Voltage Outputs with IC Interface Features Package Types Memory Options: MCP47CXBX1 (Single) - Volatile Memory: MCP47CVBXX MSOP-10, DFN-10 (3 x 3) - Nonvolatile Memory: MCP47CMBXX V DD 1 10 SDA Operating Voltage Range: A0 2 9 SCL - 2.7V to 5.5V Full specifications V - 1.8V to 2.7V Reduced device specifications REF A1 3 8 Output Voltage Resolutions: V OUT V 4 7 SS - 8-bit: MCP47CXB0X (256 steps) NC 5 6 LAT/HVC - 10-bit: MCP47CXB1X (1024 steps) - 12-bit: MCP47CXB2X (4096 steps) QFN-16 (3 x 3) Nonvolatile Memory (MTP) Size: 32 Locations 1 LSb Integral Nonlinearity (INL) Specification DAC Voltage Reference Source Options: A0 1 12 SCL - Device V DD V 2 11 A1 REF -External V pin (buffered or unbuffered) (1) REF 17 EP V 3 10 V OUT SS - Internal band gap (1.227V typical) NC 4 9 LAT/HVC Output Gain Options: -1x (Unity) - 2x (available when not using internal V as DD voltage source) MCP47CXBX2 (Dual) Power-on/Brown-out Reset (POR/BOR) MSOP-10, DFN-10 (3 x 3) Protection Power-Down Modes: V DD 1 10 SDA - Disconnects output buffer (High-Impedance) A0 2 9 SCL - Selection of V pull-down resistors OUT V REF A1 3 8 (100 k or 1 k ) V 2 OUT0 4 7 V I C Interface: SS (2) - Slave address options: register-defined V 5 6 LAT/HVC OUT1 address with two physical address select pins (package dependent) QFN-16 (3x3) - Standard (100 kbps), Fast (400 kbps), and High-Speed (up to 3.4 Mbps) modes Package Types: A0 1 12 SCL - Dual: 16-lead 3 x 3 QFN, 10-lead MSOP, V 2 11 A1 10-lead 3 x 3 DFN REF0 (1) 17 EP V 3 10 - Single: 16-lead 3 x 3 QFN, 10-lead MSOP, OUT0 V SS 10-lead 3 x 3 DFN V 4 9 REF1 LAT0/HVC Extended Temperature Range: -40C to +125C Note 1: Exposed pad (substrate paddle). 2: This pins signal can be connected to DAC0 and/or DAC1. 2018 Microchip Technology Inc. DS20006089A-page 1 V NC 5 16 DD V V 5 16 DD OUT1 NC 6 15 NC NC 6 15 NC NC 7 14 NC NC 7 14 NC NC 8 13 SDA LAT1 8 13 SDAMCP47CXBXX When the V pin is used with an external voltage General Description REF reference, the user can select between a gain of 1 or 2 The MCP47CXBXX are Single and Dual-Channel 8-bit, and can have the reference buffer enabled or disabled. 10-bit, and 12-bit buffered voltage output Digital-to- When the gain is 2, the V pin voltage should be REF Analog Converters (DAC), with volatile or MTP memory limited to a maximum of V /2. DD 2 C serial interface. and an I 2 These devices have a two-wire I C-compatible serial The MTP memory can be written by the user up to 32 interface for Standard (100 kHz), Fast (400 kHz) or times, for each specific register. It requires a high-volt- High-Speed (1.7 MHz and 3.4 MHz) modes. age level on the HVC pin, typically 7.5V, in order to suc- cessfully program the desired memory location. The Applications nonvolatile memory includes power-up output values, device configuration registers and general purpose Set Point or Offset Trimming memory. Sensor Calibration pin, the device V or the internal band gap The V Low-Power Portable Instrumentation REF DD voltage can be selected as the DACs reference PC Peripherals voltage. When V is selected, V is internally DD DD Data Acquisition Systems connected to the DAC reference circuit. MCP47CVBX1 Block Diagram (Single-Channel Output) V DD Memory Power-up/Brown-out Control V SS VOLATILE (4 x 16) 2 DAC0 SDA I C Serial Interface Module VREF and Control Logic SCL POWER-DOWN (WiperLock Technology) GAIN STATUS (1) A0 ADDR6:ADDR0 (1) A1 NONVOLATILE (13 x 16) DAC0 V IHH LAT/HVC VREF POWER-DOWN LAT0 2 GAIN/I C ADDRESS WIPERLOCK (TM) V DD PD1:PD0 and VREF1:VREF0 V Bandgap BG GAIN 1.227V VREF1:VREF0 OPAMP V OUT0 V REF0 V DD PD1:PD0 VREF1:VREF0 Note 1: Available only on specific packages. DS20006089A-page 2 2018 Microchip Technology Inc. Resistor Ladder 1k 100 k